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SSC2139 数据表(PDF) 3 Page - SeCoS Halbleitertechnologie GmbH

部件名 SSC2139
功能描述  Low Dropout Voltage Regulator
PDF  7 Pages
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制造商  SECOS [SeCoS Halbleitertechnologie GmbH]
网页  http://www.secosgmbh.com
标志 SECOS - SeCoS Halbleitertechnologie GmbH

SSC2139 数据表(HTML) 3 Page - SeCoS Halbleitertechnologie GmbH

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01-Jun-2002 Rev. A
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Any changing of specification will not be informed individual
SSC2139-AD
Part Number
Marking
Output Voltage
Part Number
Marking
Output Voltage
9CAD2
Adjustable
XXXX
Detailed Description
The SSC2139 of COMS regulators contain a PMOS pass transistor,voltage reference, error amplifier,over-current protection and thermal
shutdown.The P-channel pass transistor receives data from the error amplifier, over-current shutdown, and thermal protection circuits.
During normal operation, the error amplifier compares the output voltage to a precision reference. Over-current and Thermal shutdown circuits
become active when the junction temperature exceeds140 C, or the current exceeds 2.2A.During thermal shutdown, the output voltage
remains low. Normal operation is restored when the junction temperature drops below 120 C.
o
o
Elektronische Bauelemente
SSC2139
1.55A CMOS
Low Dropout Voltage Regulator
External Capacitors
The SSC2139 is stable with an output capacitance to ground of 4.7uF or greater. Ceramic capacitors have the lowest ESR, and will
offer the best AC performance. Conversely, Aluminum Electrolytic capacitors exhibit the highest ESR, resulting in the poorest AC
response. Unfortunately, large value ceramic capacitors are comparatively expensive. One option is to parallel a 0.1uF ceramic
capacitor with a 10uF Aluminum Electrolytic. The benefit is low ESR, high capacitance, and low overall cost. A second capacitor is
recommended between the input and ground to stabilize VIN.
The input capacitor should be at least 0.1uF to have a beneficial
effect. All capacitors should be placed in closed proximity to the pins. A "Quiet" ground termination is desirable. This can be
achieved with a "Star" connection.
Enable
When EN pin is pulled low, the PMOS pass transistor shuts off, and all internal circuits are powered down. In this state, the quiescent
current is less than 2uA. This pin behaves much like an electronic switch.
Adjustable Version
The adjustable version uses external feedback resistors to generate an output voltage anywhere from 1.5V to 5.0V. Vadj is trimmed to
1.242V and Vout is given by the equation:
VOUT=Vadj*(1+R1/R2)
Feedback resistors R1 and R2 should be high enough to keep quiescent current low, but increasing R1+R2 will reduce stability. In general,
R1 and R2 in the 10's of k will produce adequate stability, given reasonable layout precautions. To improve stability
characteristics,
keep parasitic on the ADJ pin to min., and lower R1 and R2 values.
Ω
Ordering Information(contd.)



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