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CLC1001ASO8 数据表(PDF) 4 Page - Cadeka Microcircuits LLC.

部件名 CLC1001ASO8
功能描述  Ultra-Low Noise Amplifier
PDF  17 Pages
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制造商  CADEKA [Cadeka Microcircuits LLC.]
网页  http://www.cadeka.com
标志 CADEKA - Cadeka Microcircuits LLC.

CLC1001ASO8 数据表(HTML) 4 Page - Cadeka Microcircuits LLC.

  CLC1001ASO8 Datasheet HTML 1Page - Cadeka Microcircuits LLC. CLC1001ASO8 Datasheet HTML 2Page - Cadeka Microcircuits LLC. CLC1001ASO8 Datasheet HTML 3Page - Cadeka Microcircuits LLC. CLC1001ASO8 Datasheet HTML 4Page - Cadeka Microcircuits LLC. CLC1001ASO8 Datasheet HTML 5Page - Cadeka Microcircuits LLC. CLC1001ASO8 Datasheet HTML 6Page - Cadeka Microcircuits LLC. CLC1001ASO8 Datasheet HTML 7Page - Cadeka Microcircuits LLC. CLC1001ASO8 Datasheet HTML 8Page - Cadeka Microcircuits LLC. CLC1001ASO8 Datasheet HTML 9Page - Cadeka Microcircuits LLC. Next Button
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Data Sheet
©2007-2008 CADEKA Microcircuits LLC
www.cadeka.com
4
Electrical Characteristics at +5V
TA = 25°C, Vs = +5V, Rf = 200Ω, RL = 500Ω to VS/2, G = 10; unless otherwise noted.
Symbol
Parameter
Conditions
Min
Typ
Max
Units
Frequency Domain Response
GBWP
-3dB Gain Bandwidth Product
G = +40, VOUT = 0.2Vpp
2000
MHz
BWSS
-3dB Bandwidth
G = +10, VOUT = 0.2Vpp
265
MHz
BWLS
Large Signal Bandwidth
G = +10, VOUT = 2Vpp
105
MHz
BW0.1dBSS
0.1dB Gain Flatness Small Signal
G = +10, VOUT = 0.2Vpp
37
MHz
BW0.1dBLS
0.1dB Gain Flatness Large Signal
G = +10, VOUT = 2Vpp
36
MHz
Time Domain Response
tR, tF
Rise and Fall Time
VOUT = 1V step; (10% to 90%)
2.4
ns
tS
Settling Time to 0.1%
VOUT = 1V step
11
ns
OS
Overshoot
VOUT = 1V step
6
%
SR
Slew Rate
4V step
360
V/µs
Distortion/Noise Response
HD2
2nd Harmonic Distortion
1Vpp, 10MHz
-80
dBc
HD3
3rd Harmonic Distortion
1Vpp, 10MHz
-83
dBc
THD
Total Harmonic Distortion
1Vpp, 10MHz
-79
dB
en
Input Voltage Noise
> 100kHz
0.6
nV/√Hz
in
Input Current Noise
> 100kHz
4.2
pA/√Hz
DC Performance
VIO
Input Offset Voltage
0.1
mV
dVIO
Average Drift
2.7
µV/°C
Ib
Input Bias Current
28
µA
dIb
Average Drift
45
nA/°C
Io
Input Offset Current
0.5
µA
PSRR
Power Supply Rejection Ratio
DC
83
dB
AOL
Open-Loop Gain
VOUT = VS / 2
82
dB
IS
Supply Current
per channel
12
mA
Disable Characteristics
tON
Turn On Time
1V step, 1% settling
100
ns
tOFF
Turn Off Time
900
ns
OFFISO
Off Isolation
2Vpp, 5MHz
80
dB
OFFCOUT
Off Output Capacitance
5.7
pF
VOFF
Power Down Voltage
Disabled if DIS pin is grounded or pulled below VOFF
Disabled if DIS < 1.5
V
VON
Enable Voltage
Enabled if DIS pin is floating or pulled above VON
Enabled if DIS > 3
V
ISD
Disable Supply Current
No Load, DIS pin tied to ground
130
µA
Input Characteristics
RIN
Input Resistance
Non-inverting
2.6
MΩ
CIN
Input Capacitance
1.6
pF
CMIR
Common Mode Input Range
0.8 to
5.1
V
CMRR
Common Mode Rejection Ratio
DC , Vcm=1.5V to 4V
85
dB
Output Characteristics
VOUT
Output Voltage Swing
RL = 500Ω
0.93 to 4
V
RL = 2kΩ
0.9 to
4.1
V
IOUT
Output Current
±130
mA
ISC
Short-Circuit Output Current
VOUT = VS / 2
±150
mA
Notes:
1. 100% tested at 25°C



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