Data Sheet

©2004-2008 CADEKA Microcircuits LLC

www.cadeka.com

13

0

0.5

1

1.5

2

2.5

-40

-20

0

20

40

60

80

Ambient Temperature (°C)

SOT23-6

SOIC-8

Figure 3. Maximum Power Derating

Driving Capacitive Loads

Increased phase delay at the output due to capacitive load-

ing can cause ringing, peaking in the frequency response,

and possible unstable behavior. Use a series resistance,

stability and settling performance. Refer to Figure 4.

+

-

Input

Output

Capacitive Loads

The CLC1003 family of amplifiers is capable of driving up to

300pF directly, with no series resistance. Directly driving

500pF causes over 4dB of frequency peaking, as shown in

result in <=1dB peaking in the frequency response. The

the response of the CLCx003.

-3dB BW (MHz)

500

10

27

1000

7.5

20

3000

4

15

tradeoff between settling time and bandwidth. In general,

ditional overshoot and ringing.

Overdrive Recovery

An overdrive condition is defined as the point when ei-

ther one of the inputs or the output exceed their specified

voltage range. Overdrive recovery is the time needed for

the amplifier to return to its normal or linear operating

point. The recovery time varies, based on whether the

input or output is overdriven and by how much the range

is exceeded. The CLCx003 will typically recover in less

than 20ns from an overdrive condition. Figure 5 shows the

CLC1003 in an overdriven condition.

Figure 5. Overdrive Recovery

Considerations for Offset and Noise Performance

Offset Analysis

There are three sources of offset contribution to consider;

input bias current, input bias current mismatch, and input

offset voltage. The input bias currents are assumed to

be equal with and additional offset current in one of the

inputs to account for mismatch. The bias currents will not

IN

–

+

CLC1003

Figure 6: Circuit for Evaluating Offset

-2

-2

-1

-1

0

1

1

2

2

-3

-2

-1

0

1

2

3

0

0.25

0.5

0.75

1

1.25

1.5

1.75

2

Time (us)

Output

Input

G = 5