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CLC2601 数据表(PDF) 4 Page - Cadeka Microcircuits LLC.

部件名 CLC2601
功能描述  Dual, Triple, and Quad 550MHz Amplifiers
PDF  15 Pages
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制造商  CADEKA [Cadeka Microcircuits LLC.]
网页  http://www.cadeka.com
标志 CADEKA - Cadeka Microcircuits LLC.

CLC2601 数据表(HTML) 4 Page - Cadeka Microcircuits LLC.

  CLC2601 Datasheet HTML 1Page - Cadeka Microcircuits LLC. CLC2601 Datasheet HTML 2Page - Cadeka Microcircuits LLC. CLC2601 Datasheet HTML 3Page - Cadeka Microcircuits LLC. CLC2601 Datasheet HTML 4Page - Cadeka Microcircuits LLC. CLC2601 Datasheet HTML 5Page - Cadeka Microcircuits LLC. CLC2601 Datasheet HTML 6Page - Cadeka Microcircuits LLC. CLC2601 Datasheet HTML 7Page - Cadeka Microcircuits LLC. CLC2601 Datasheet HTML 8Page - Cadeka Microcircuits LLC. CLC2601 Datasheet HTML 9Page - Cadeka Microcircuits LLC. Next Button
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Data Sheet
©2004-2008 CADEKA Microcircuits LLC
www.cadeka.com
4
Electrical Characteristics
TA = 25°C, Vs = ±5V, Rf = 510Ω, RL = 100Ω to GND, G = 2; unless otherwise noted.
symbol
parameter
conditions
Min
typ
Max
units
Frequency Domain Response
UGBW
-3dB Bandwidth
G = +1, VOUT = 0.2Vpp, Rf = 1kΩ
550
MHz
BWSS
-3dB Bandwidth
G = +2, VOUT = 0.2Vpp
335
MHz
BWLS
Large Signal Bandwidth
G = +2, VOUT = 4Vpp
200
MHz
BW0.1dBSS
0.1dB Gain Flatness
G = +2, VOUT = 0.2Vpp
(Rf=453Ω for CLC4601)
120
MHz
BW0.1dBLS
0.1dB Gain Flatness
G = +2, VOUT = 4Vpp
55
MHz
Time Domain Response
tR, tF
Rise and Fall Time
VOUT = 2V step; (10% to 90%)
1.4
ns
tS
Settling Time to 0.1%
VOUT = 2V step
20
ns
OS
Overshoot
VOUT = 0.2V step
1.5
%
SR
Slew Rate
VOUT = 4V step
1500
V/µs
Distortion/Noise Response
HD2
2nd Harmonic Distortion
2Vpp, 1MHz
-82
dBc
HD3
3rd Harmonic Distortion
2Vpp, 1MHz
-83
dBc
THD
Total Harmonic Distortion
2Vpp, 1MHz
-80
dB
DG
Differential Gain
NTSC (3.58MHz), DC-coupled, RL = 150Ω
0.01
%
DP
Differential Phase
NTSC (3.58MHz), DC-coupled, RL = 150Ω
0.06
°
en
Input Voltage Noise
> 1MHz
7
nV/√Hz
in+
Input Current Noise (+)
> 1MHz
1.3
pA/√Hz
in-
Input Current Noise (-)
> 1MHz
11
pA/√Hz
XTALK
Crosstalk
Channel-to-channel 5MHz
-56
dB
DC Performance
VIO
Input Offset Voltage(1)
-7.5
2.7
+7.5
mV
dVIO
Average Drift
15
µV/°C
Ibn
Input Bias Current Non-inverting(1)
-7.0
2.6
7.0
µA
dIbn
Average Drift
6
nA/°C
Ibi
Input Bias Current Inverting(1)
-30
7.4
30
µA
dIbni
Average Drift
15
nA/°C
PSRR
Power Supply Rejection Ratio(1)
DC
57
61
dB
ZOL
Open-Loop Transimpedance
VOUT = VS / 2
420
kΩ
IS
Supply Current(1)
CLC2601 Total
10.4
14
mA
CLC3601 Total
20.8
28
mA
CLC4601 Total
20.8
28
mA
Input Characteristics
RIN
Input Resistance
Non-inverting
8
MΩ
CIN
Input Capacitance
1
pF
CMIR
Common Mode Input Range
±2.3
V
CMRR
Common Mode Rejection Ratio(1)
DC
50
54
dB
Output Characteristics
RO
Output Resistance
Closed Loop, DC
90
mΩ
VOUT
Output Voltage Swing
RL = 100Ω (1)
-2.6
±2.95
2.6
V
RL = 1kΩ
±3.35
V
IOUT
Output Current
52
mA
ISC
Short-Circuit Output Current
VOUT = VS / 2
65
mA
notes:
1. 100% tested at 25°C



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