DATA SHEET

KH560

6

REV. 1A January 2004

SUMMARY DESIGN EQUATIONS AND DEFINITIONS

KH560 Description of Operation

Looking at the circuit of Figure 1 (the topology and

resistor values used in setting the data sheet specifica-

tions), the KH560 appears to bear a strong external

resemblance to a classical op amp. As shown in the

simplified block diagram of Figure 2, however, it differs in

several key areas. Principally, the error signal is a

current into the inverting input (current feedback) and the

forward gain from this current to the output is relatively

low, but very well controlled, current gain. The KH560

has been intentionally designed to have a low internal

gain and a current mode output in order that an equivalent

output impedance can be achieved without the series

matching resistor more commonly required of low output

impedance op amps. Many of the benefits of a high loop

gain have, however, been retained through a very careful

control of the KH560’s internal characteristics.

The feedback and gain setting resistors determine both

adjustment would be possible if the inverting input imped-

specification listing, independent gain and output imped-

ance setting is not directly possible.

Figure 1: Test Circuit

Design Equations

Performance Equations

Simplified Circuit Description

Looking at the KH560’s simplified schematic in Figure 2,

the amplifier’s operation may be described. Going from

the non-inverting input at pin 8 to the inverting input at pin

18, transistors Q1 – Q4 act as an open loop unity gain

buffer forcing the inverting node voltage to follow the non-

inverting voltage input.

Transistors Q3 and Q4 also act as a low impedance (14

Ω

looking into pin 18) path for the feedback error current.

very well defined current mirror having a gain of 10 from

this error current to the output. The current mirror outputs

act as the amplifier output.

The input stage bias currents are supply voltage inde-

pendent. Since these set the bias level for the whole

from output to inverting

input

resistor from inverting

input to ground

compensation capacitor

from output to

pin 19 (in pF)

Where:

gain with no load

G – Internal current gain from inverting input

to output = 10 ±1%

load resistor

RG 1 R

A R

R

RR

A1

C

1

R

300 1

2

R

0.08

f

ov i

g

f

o

v

x

o

g

=+

()

−

=

−

−

=

−













−

6.8

µF

.1

µF

410

Ω

40

Ω

5,10,15,

20

21

KH560

+

-

18

50

Ω

8

50

Ω

4

19

.1

µF

6.8

µF

+

+

23

10.5pF

Resistor Values

shown result in:

Ro = 50Ω

Av = +10

(no-load gain)

(gain to 50

Ω load)

K

RG 1 R

A R

R

RR

A1

f

ov i

g

f

o

v

=+

()

−

=

−

−

R

RR 1

R

R

G1

R

R

A1

R

R

G

R

R

G1

R

R

o

f

i

f

g

i

g

v

f

g

i

f

i

g

=

++













++

=+

−

++

























Where:

G

≡ forward current gain

(=10)

resistance (=14

Ω)

impedance

inverting voltage

gain with no load