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SN74LVTH574DB 数据表(PDF) 2 Page - Texas Instruments |
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SN74LVTH574DB 数据表(HTML) 2 Page - Texas Instruments |
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2 / 7 page ![]() SN54LVTH574, SN74LVTH574 3.3-V ABT OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS SCBS688D – MAY 1997 – REVISED APRIL 1999 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 description (continued) These devices are fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict. The SN54LVTH574 is characterized for operation over the full military temperature range of –55 °C to 125°C. The SN74LVTH574 is characterized for operation from –40 °C to 85°C. FUNCTION TABLE (each flip-flop) INPUTS OUTPUT OE CLK D Q L ↑ H H L ↑ LL L H or L X Q0 H X X Z logic symbol† † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. OE 1D 2 1D 3 2D 4 3D 5 4D 6 5D 11 CLK 1Q 19 2Q 18 3Q 17 4Q 16 5Q 15 6Q 14 7Q 13 8Q 12 7 6D 8 7D 9 8D EN 1 C1 logic diagram (positive logic) OE CLK 1D 1Q To Seven Other Channels C1 1 11 2 19 1D |
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