SN65176B, SN75176B

DIFFERENTIAL BUS TRANSCEIVERS

SLLS101D – JULY 1985 – REVISED APRIL 2003

8

POST OFFICE BOX 655303

PARAMETER MEASUREMENT INFORMATION

VOLTAGE WAVEFORMS

tPHZ

1.5 V

2.3 V

0.5 V

0 V

3 V

tPZH

Output

Input

1.5 V

S1

0 V or 3 V

Output

CL = 50 pF

(see Note A)

TEST CIRCUIT

50

Ω

VOH

Voff ≈0 V

RL = 110 Ω

Generator

(see Note B)

NOTES: A. CL includes probe and jig capacitance.

B. The input pulse is supplied by a generator having the following characteristics: PRR

≤ 1 MHz, 50% duty cycle, tr ≤ 6 ns, tf ≤ 6 ns,

ZO = 50 Ω.

Figure 4. Driver Test Circuit and Voltage Waveforms

VOLTAGE WAVEFORMS

5 V

VOL

0.5 V

tPZL

3 V

0 V

tPLZ

2.3 V

1.5 V

Output

Input

TEST CIRCUIT

Output

RL = 110 Ω

5 V

S1

CL = 50 pF

(see Note A)

50

Ω

3 V or 0 V

Generator

(see Note B)

1.5 V

NOTES: A. CL includes probe and jig capacitance.

B. The input pulse is supplied by a generator having the following characteristics: PRR

≤ 1 MHz, 50% duty cycle, tr ≤ 6 ns, tf ≤ 6 ns,

ZO = 50 Ω.

Figure 5. Driver Test Circuit and Voltage Waveforms

VOLTAGE WAVEFORMS

1.3 V

0 V

3 V

VOL

VOH

tPHL

tPLH

1.5 V

Output

Input

TEST CIRCUIT

CL = 15 pF

(see Note A)

Output

0 V

1.5 V

51

Ω

Generator

(see Note B)

1.5 V

1.3 V

NOTES: A. CL includes probe and jig capacitance.

B. The input pulse is supplied by a generator having the following characteristics: PRR

≤ 1 MHz, 50% duty cycle, tr ≤ 6 ns, tf ≤ 6 ns,

ZO = 50 Ω.

Figure 6. Receiver Test Circuit and Voltage Waveforms