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PRE

CLK

K

Q

Q

CLR

J

SN74LVC112A

DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP

WITH CLEAR AND PRESET

SCAS289L – JANUARY 1993 – REVISED AUGUST 2005

FUNCTION TABLE

INPUTS

OUTPUTS

PRE

CLR

CLK

J

K

Q

Q

L

H

X

X

X

H

L

H

L

X

X

X

L

H

L

L

X

X

X

H

H

↓

L

L

H

H

↓

H

L

H

L

H

H

↓

L

H

L

H

H

H

↓

H

H

Toggle

H

H

H

X

X

(1)

The output levels in this configuration may not meet the minimum

it does not persist when either PRE or CLR returns to its inactive

(high) level.

LOGIC DIAGRAM, EACH FLIP-FLOP (POSITIVE LOGIC)

2