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A

Y

2

4

A

Y

1

3

SN74LVC1GU04

SINGLE INVERTER GATE

SCES215T – APRIL 1999 – REVISED JANUARY 2007

ORDERING INFORMATION

TOP-SIDE

ORDERABLE PART NUMBER

NanoFree™ – WCSP (DSBGA)

0.23-mm Large Bump – YZP

SN74LVC1GU04YZPR

_ _ _CD_

(Pb-free)

Reel of 3000

NanoFree™ – WCSP (DSBGA)

_ _ _ _

0.23-mm Large Bump – YZV

SN74LVC1GU04YZVR

CD

(Pb-free)

–40

°C to 85°C

Reel of 3000

SN74LVC1GU04DBVR

SOT (SOT-23) – DBV

CU4_

Reel of 250

SN74LVC1GU04DBVT

Reel of 3000

SN74LVC1GU04DCKR

SOT (SC-70) – DCK

CD_

Reel of 250

SN74LVC1GU04DCKT

SOT (SOT-553) – DRL

Reel of 4000

SN74LVC1GU04DRLR

CD_

(1)

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at

(2)

DBV/DCK/DRL: The actual top-side marking has one additional character that designates the assembly/test site.

YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following

character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb,

• = Pb-free).

YZV: The actual top-side marking is on two lines. Line 1 has four characters to denote year, month, day, and assembly/test site. Line 2

has two characters which show the family and function code. Pin 1 identifier indicates solder-bump composition (1 = SnPb,

• = Pb-free).

FUNCTION TABLE

INPUT

OUTPUT

A

Y

H

L

L

H

LOGIC DIAGRAM (POSITIVE LOGIC)

DBV, DCK, DRL, and YZP PACKAGE

YZV PACKAGE

2

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