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FEATURES

DBV OR DCK PACKAGE

(TOP VIEW)

1

2

3

5

4

D

CLK

GND

Q

3

2

1

4

5

GND

CLK

D

Q

YEA, YEP, YZA, OR YZP PACKAGE

(BOTTOM VIEW)

DESCRIPTION/ORDERING INFORMATION

SN74LVC1G80

SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP

SCES221O – APRIL 1999 – REVISED JUNE 2005

•

Available in the Texas Instruments

NanoStar™ and NanoFree™ Packages

•

•

Inputs Accept Voltages to 5.5 V

•

•

Low Power Consumption, 10-

µA Max I

CC

•

±24-mA Output Drive at 3.3 V

•

Operation

•

Latch-Up Performance Exceeds 100 mA Per

JESD 78, Class II

•

ESD Protection Exceeds JESD 22

– 2000-V Human-Body Model (A114-A)

– 200-V Machine Model (A115-A)

– 1000-V Charged-Device Model (C101)

When data at the data (D) input meets the setup time requirement, the data is transferred to the Q output on the

positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the

rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting

the level at the output.

NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the

die as the package.

preventing damaging current backflow through the device when it is powered down.

ORDERING INFORMATION

ORDERABLE PART NUMBER

NanoStar™ – WCSP (DSBGA)

SN74LVC1G80YEAR

0.17-mm Small Bump – YEA

NanoFree™ – WCSP (DSBGA)

SN74LVC1G80YZAR

0.17-mm Small Bump – YZA (Pb-free)

Reel of 3000

_ _ _CX_

NanoStar™ – WCSP (DSBGA)

SN74LVC1G80YEPR

0.23-mm Large Bump – YEP

–40°C to 85°C

NanoFree™ – WCSP (DSBGA)

SN74LVC1G80YZPR

0.23-mm Large Bump – YZP (Pb-free)

Reel of 3000

SN74LVC1G80DBVR

SOT (SOT-23) – DBV

C80_

Reel of 250

SN74LVC1G80DBVT

Reel of 3000

SN74LVC1G80DCKR

SOT (SC-70) – DCK

CX_

Reel of 250

SN74LVC1G80DCKT

(1)

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at

www.ti.com/sc/package.

(2)

DBV/DCK: The actual top-side marking has one additional character that designates the assembly/test site.

YEA/YZA, YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one

following character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb,

• = Pb-free).

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

NanoStar, NanoFree are trademarks of Texas Instruments.

PRODUCTION DATA information is current as of publication date.

Copyright © 1999–2005, Texas Instruments Incorporated

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.