AP1250CMP datasheet(1/5 Pages) A-POWER

部件名	AP1250CMP

功能描述	2A Sink/Source Bus Termination Regulator

PDF	5 Pages

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制造商	A-POWER [Advanced Power Electronics Corp.]

网页	http://www.a-power.com.tw

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Description

The

AP1250CMP is a simple, cost-effective and

high-speed linear regulator designed to generate

termination voltage in double data rate (DDR)

memory system to comply with the JEDEC SSTL_2

and SSTL_18 or other specific interfaces such as

HSTL,

SCSI-2

and

SCSI-3

etc.

devices

requirements. The regulator is capable of actively

sinking or sourcing up to 2A while regulating an

output voltage to within 40mV. The output

termination voltage cab be tightly regulated to track

1/2VDDQ by two external voltage divider resistors or

the desired output voltage can be pro-grammed by

externally forcing the REFEN pin voltage.

The

AP1250CMP also incorporates a high-speed

differential amplifier to provide ultra-fast response in

line/load transient. Other features include extremely

low initial offset voltage, excellent load regulation,

current limiting in bi-directions and on-chip thermal

shut-down protection.

The

AP1250CMP are available in the ESOP-8

(Exposed Pad) surface mount packages.

Features

Ideal for DDR-I, DDR-II and DDR-III VTT Applications

Sink and Source 2A Continuous Current

Integrated Power MOSFETs

Generates Termination Voltage for SSTL_2, SSTL

_18, HSTL, SCSI-2 and SCSI-3 Interfaces.

High Accuracy Output Voltage at Full-Load

Output Adjustment by Two External Resistors

Low External Component Count

Shutdown for Suspend to RAM (STR) Functionality

with High-Impedance Output

Current Limiting Protection

On-Chip Thermal Protection

Available in

ESOP-8 (Exposed Pad) Packages

VIN and VCNTL No Power Sequence Issue

RoHS Compliant and 100% Lead (Pb)-Free

Pin Configuration

Application

Desktop PCs, Notebooks, and Workstations

Graphics Card Memory Termination

Set Top Boxes, Digital TVs, Printers

Embedded Systems

Active Termination Buses

DDR-I, DDR-II and DDR-III Memory Systems

Block Diagram

Pin Description

Pin Name

Pin function

VIN

Power Input

GND

Ground

VCNTL

Gate Drive Voltage

REFEN

Reference Voltage input and Chip Enable

VOUT

Output Voltage

Advanced Power

Electronics Corp.

AP1250CMP

2A Sink/Source Bus Termination Regulator

200901074

GND

VOUT

VIN

REFEN

NC

VCNTL

NC

1

3

2

4

8

6

7

5

ESOP-8 (MP)

(Top View)

GND

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