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S12CPUV2 数据表(PDF) 75 Page - Motorola, Inc

部件名 S12CPUV2
功能描述  MC9S12DT128 Device User Guide V02.09
PDF  138 Pages
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制造商  MOTOROLA [Motorola, Inc]
网页  http://www.freescale.com
标志 MOTOROLA - Motorola, Inc

S12CPUV2 数据表(HTML) 75 Page - Motorola, Inc

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MC9S12DT128 Device User Guide — V02.09
75
Section 3 System Clock Description
3.1 Overview
The Clock and Reset Generator provides the internal clock signals for the core and all peripheral modules.
Figure 3-1 shows the clock connections from the CRG to all modules.
Consult the CRG Block User Guide for details on clock generation.
Figure 3-1 Clock Connections
CRG
bus clock
core clock
EXTAL
XTAL
oscillator clock
HCS12 CORE
IIC
RAM
SCI0, SCI1
PWM
ATD0, 1
BF
Flash
ECT
BDLC
SPI0, 1
CAN0, 1, 4
PIM
EEPROM
BDM
MEBI
INT
CPU
BKP
MMC



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