数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

FT4232H 数据表(PDF) 21 Page - Future Technology Devices International Ltd.

部件名 FT4232H
功能描述  QUAD HIGH SPEED USB TO MULTIPURPOSE UART
PDF  43 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  FTDI [Future Technology Devices International Ltd.]
网页  http://www.ftdichip.com
标志 FTDI - Future Technology Devices International Ltd.

FT4232H 数据表(HTML) 21 Page - Future Technology Devices International Ltd.

Back Button FT4232H Datasheet HTML 17Page - Future Technology Devices International Ltd. FT4232H Datasheet HTML 18Page - Future Technology Devices International Ltd. FT4232H Datasheet HTML 19Page - Future Technology Devices International Ltd. FT4232H Datasheet HTML 20Page - Future Technology Devices International Ltd. FT4232H Datasheet HTML 21Page - Future Technology Devices International Ltd. FT4232H Datasheet HTML 22Page - Future Technology Devices International Ltd. FT4232H Datasheet HTML 23Page - Future Technology Devices International Ltd. FT4232H Datasheet HTML 24Page - Future Technology Devices International Ltd. FT4232H Datasheet HTML 25Page - Future Technology Devices International Ltd. Next Button
Zoom Inzoom in Zoom Outzoom out
 21 / 43 page
background image
Copyright © 2009 Future Technology Devices International Limited
21
Document No.: FT_000060
FT4232H QUAD HIGH SPEED USB TO MULTIPURPOSE UART/MPSSE IC
Datasheet Version 2.05
Clearance No.: FTDI#78
4.5
Synchronous and Asynchronous Bit-Bang Interface Mode Description
The FT4232H channel A,B,C or channel D can be configured as a bit-bang interface. There are two types of
bit-bang modes: synchronous and asynchronous.
Asynchronous Bit-Bang Mode
Asynchronous Bit-Bang mode is the same as BM-style Bit-Bang mode. On any channel configured in
asynchronous bit-bang mode. data written to the device in the normal manner will be self clocked onto the
parallel I/O data pins (those which have been configured as outputs). Each I/O pin can be independently set
as an input or an output. The rate that the data is clocked out at is controlled by the baud rate generator.
For the data to change there has to be new data written, and the baud rate clock has to tick. If no new data is
written to the channel, the pins will hold the last value written.
Synchronous Bit-Bang Mode
The synchronous Bit-Bang mode will only update the output parallel I/O port pins whenever data is sent from
the USB interface to the parallel interface. When this is done, data is read from the USB Rx FIFO buffer and
written out on the pins. Data can only be received from the parallel pins (to the USB Tx FIFO interface) when
the parallel interface has been written to.
With Synchronous Bit-Bang mode, data will only be sent out by the FT4232H if there is space in the
FT4232H USB TXFIFO for data to be read from the parallel interface pins. This Synchronous Bit-Bang mode
will read the data bus parallel I/O pins first, before it transmits data from the USB RxFIFO. It is therefore 1
byte behind the output, and so to read the inputs for the byte that you have just sent, another byte must be
sent.
For example :-
(1) Pins start at 0xFF
Send 0x55,0xAA
Pins go to 0x55 and then to 0xAA
Data read = 0xFF,0x55
(2) Pins start at 0xFF
Send 0x55,0xAA,0xAA
(repeat the last byte sent)
Pins go to 0x55 and then to 0xAA
Data read = 0xFF,0x55,0xAA
Synchronous Bit-Bang Mode differs from Asynchronous Bit-Bang mode in that the device parallel output is
only read when the parallel output is written to by the USB interface. This makes it easier for the controlling
program to measure the response to a USB output stimulus as the data returned to the USB interface is
synchronous to the output data.
Asynchronous Bit-Bang mode is enabled using Set Bit Bang Mode driver command. A hex value of 1 will
enable Asynchronous Bit-Bang mode.
Synchronous Bit-Bang mode is enabled using Set Bit Bang Mode driver command. A hex value of 4 will
enable Synchronous Bit-Bang mode.
See application note AN2232-02, “Bit Mode Functions for the FT2232” for more details and examples of
using the bit-bang modes.
An example of the synchronous bi-bang mode timing is shown in Figure 4.5 and Table 4.2.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com