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TLV5614CPWR 数据表(PDF) 13 Page - Texas Instruments |
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TLV5614CPWR 数据表(HTML) 13 Page - Texas Instruments |
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13 / 27 page ![]() TLV5614 2.7-V TO 5.5-V 12-BIT 3- µS QUADRUPLE DIGITAL-TO-ANALOG CONVERTERS WITH POWER DOWN SLAS188 – SEPTEMBER 1998 13 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 APPLICATION INFORMATION serial interface (continued) If there is no need to have more than one device on the serial bus, then CS can be tied low. Figure 16 shows an example of how to connect the TLV5614 to a TMS320, SPI, or Microwire port using only three pins. TMS320 DSP FSX DX CLKX TLV5614 FS DIN SCLK CS SPI SS MOSI SCLK TLV5614 FS DIN SCLK CS Microwire I/O SO SK TLV5614 FS DIN SCLK CS Figure 16. Three-Wire Interface Notes on SPI and Microwire: Before the controller starts the data transfer, the software has to generate a falling edge on the I/O pin connected to FS. If the word width is 8 bits (SPI and Microwire), two write operations must be performed to program the TLV5614. After the write operation(s), the DAC output is updated automatically on the sixteenth positive clock edge. serial clock frequency and update rate The maximum serial clock frequency is given by: f SCLKmax + 1 t wH(min) ) t wL(min) + 20 MHz The maximum update rate is: f UPDATEmax + 1 16 t wH(min) ) t wL(min) + 1.25 MHz Note that the maximum update rate is a theoretical value for the serial interface since the settling time of the TLV5614 has to be considered also. data format The 16-bit data word for the TLV5614 consists of two parts: D Control bits (D15 . . . D12) D New DAC value (D11 ...D0) D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 A1 A0 PWR SPD New DAC value (12 bits) X: don’t care SPD: Speed control bit. 1 → fast mode 0 → slow mode PWR: Power control bit. 1 → power down 0 → normal operation |
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