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数据搜索系统，热门电子元器件搜索 |
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TMS77C82 数据表(PDF) 21 Page - Texas Instruments |
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TMS77C82 数据表(HTML) 21 Page - Texas Instruments |
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21 / 49 page  TMS370Cx0x 8-BIT MICROCONTROLLER SPNS029C – SEPTEMBER 1995 – REVISED FEBRUARY 1997 21 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443 programmable timer 1 (continued) Figure 6 shows the timer 1 capture/compare mode block diagram. The annotations on the diagram identify the register and the bit(s) in the peripheral frame. For example, the actual address of T1CTL2.0 is 104Ah, bit 0, in the T1CTL2 register. T1CTL4.2 16 Compare= Edge Select T1IC/CR T1EDGE POLARITY T1EDGE DET ENA Prescale Clock Source 16-Bit Counter MSB LSB T1CNTR.15-0 Reset T1C1 RST ENA T1 SW RESET T1CTL2.0 T1CTL4.4 T1PC2.3-0 T1CTL4.0 T1EDGE INT FLAG T1EDGE INT ENA T1CTL3.7 T1CTL3.2 T1 OVRFL INT FLAG T1 OVRFL INT ENA T1CTL2.3 T1CTL2.4 T1C1 INT FLAG T1C1 INT ENA T1CTL3.5 T1CTL3.0 T1C1 OUT ENA T1PWM T1CTL4.6 T1PC2.7-4 16-Bit Capt/Comp MSB LSB Register T1CC.15-0 T1C.15-0 16-Bit Compare MSB LSB Register T1 PRIORITY T1PRI.6 Level 1 Int Level 2 Int 0 1 Figure 6. Capture/Compare Mode |
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