TP3064A, TP3067A, TP13064A, TP13067A

MONOLITHIC SERIAL INTERFACE

COMBINED PCM CODEC AND FILTER

SCTS025C – SEPTEMBER 1992 –REVISED JULY 1996

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POST OFFICE BOX 655303

Systems Include:

– Transmit High-Pass and Low-Pass

Filtering

– Receive Low-Pass Filter With (sin x)/x

Correction

– Active RC Noise Filters

–

µ-Law or A-Law Compatible Coder and

Decoder

– Internal Precision Voltage Reference

– Serial I/O Interface

– Internal Autozero Circuitry

Density

Semiconductor TP3064, TP3067, TP3064-X,

TP3067-X

description

The

TP3064A,

TP3067A,

TP13064A,

and

TP13067A are comprised of a single-chip PCM

codec (pulse-code-modulated encoder and de-

coder) and PCM line filter. These devices provide

all the functions required to interface a full-duplex

(2-wire) voice telephone circuit with a TDM

(time-division-multiplexed) system. These de-

vices are pin-for-pin compatible with the National

Semiconductor TP3064A and TP3067A, respec-

tively. Primary applications include:

switching of T1 carrier, PABX, and central

office telephone systems

These devices are designed to perform the transmit encoding (A/D conversion) and receive decoding (D/A

conversion) as well as the transmit and receive filtering functions in a PCM system. They are intended to be

used at the analog termination of a PCM line or trunk. The devices require two transmit and receive master

clocks that may be asynchronous (1.536 MHz, 1.544 MHz, or 2.048 MHz), transmit and receive data clocks that

are synchronous with the master clock (but can vary from 64 kHz to 2.048 MHz), and transmit and receive

frame-sync pulses. The TP3064A, TP3067A, TP13064A, and TP13067A provide the band-pass filtering of the

analog signals prior to encoding and after decoding of voice and call progress tones. The TP3067A and

TP13067A contain patented circuitry to achieve low transmit channel idle noise and are not recommended for

applications in which the composite signals on the transmit side are below – 55 dBm0.

The TP3064A and TP3067A are characterized for operation from 0

°C to 70°C. The TP13064A and TP13067A

are characterized for operation from – 40

°C to 85°C.

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the CMOS gates.

Copyright

© 1996, Texas Instruments Incorporated

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

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VPO+

ANLG GND

VPO –

VPI

VFRO

FSR

DR

BCLKR/CLKSEL

MCLKR/PDN

VFXI+

VFXI –

GSX

ANLG LOOP

TSX

FSX

DX

BCLKX

MCLKX

DW OR N PACKAGE

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