ASM3P2811A/B

ASM3P2812A/B

April 2008

ASM3P2814A/B

rev 1.6

Low Power EMI Reduction IC

2 of 11

Notice: The information in this document is subject to change without notice.

Block Diagram

Pin Configuration

Pin Description

Pin#

Pin Name

Type

Description

1

XIN / CLKIN

I

Crystal connection or external Clock input.

2

VSS

P

Ground to entire chip.

3

D_C

I

Digital logic input used to select Down (LOW) or Center (HIGH) spread options.

(Refer Frequency Deviation and Spread Selection Table).

This pin has an internal pull-up resistor.

4

SRS

I

Spread range select. Digital logic input used to select frequency deviation

(Refer Frequency Deviation and Spread Selection Table).

This pin has an internal pull-up resistor.

5

ModOUT

O

Spread spectrum clock output

6

FRS

I

Frequency range select. Digital logic input used to select Input frequency range

(Refer Input/Output Frequency Range Selection Table).

This pin has an internal pull-up resistor.

7

VDD

P

Power supply for the entire chip.

8

XOUT

O

Crystal connection. If using an external reference, this pin must be left

unconnected.

XIN /CLKIN

Crystal

Oscillator

Frequency

Divider

Feedback

Divide

Modulation

Phase

Detector

Loop

Filter

VCO

Output

Divider

ModOUT

PLL

VDD

D_C SRS FRS

XOUT

VSS

ModOUT

1

2

3

4

5

6

7

8

FRS

XOUT

XIN / CLKIN

VSS

D_C

SRS

VDD

ASM3P2811A/B

ASM3P2812A/B

ASM3P2814A/B