3 of 10

Notice: The information in this document is subject to change without notice

5V µP Power Supply Monitor and Reset Circuit

rev 1.6

November 2006

ASM1232LP/LPS

Detailed Description

The ASM1232LP/LPS monitors the microprocessor or

microcontroller power supply and generates reset signal,

both active HIGH and Active LOW, that halt processor

operation whenever the power supply voltage levels are

outside a predetermined tolerance.

RESET and RESET outputs

RESET is an active HIGH signal developed by a CMOS

push-pull output stage and is the logical opposite to RESET.

RESET is an active LOW signal. It is developed with an open

drain driver. A pull up resistor of typical value 10k

Ω to 50kΩ is

required to connect with the output.

Trip Point Tolerance Selection

below 5V without asserting a reset. With TOL conected to

below 4.5V. RESET and RESET become active when the

and RESET remain active for a minimum time period of

threshold RESET stays LOW and is guaranteed to be 0.4V or

Application Information

Manual Reset Operation

Push-button switch input, PBRST, allows the user to override

the internal trip point detection circuits and issue reset

signals. The pushbutton input is debounced and is pulled

HIGH through an internal 40k

Ω resistor.

Tolerance

Select

Tolerance

TRIP Point Voltage

(V)

Min

Nom

Max

10%

4.25

4.37

4.49

TOL = GND

5%

4.5

4.62

4.74

RESET

RESET

Figure 1: Timing Diagram : Power Up

RESET

RESET

Figure 2: Timing Diagram : Power Down