January 2007

PCS3P2191A

rev 0.1

Spread Spectrum Clock Generator

2 of 8

Notice: The information in this document is subject to change without notice.

Pin Configuration

Pin Description

Pin#

Pin Name

Type

Description

1

VDD

power

Power Supply Voltage Pin. Connect to +3.3V.

2

GND

power

Ground Connection. Connect to system ground.

3

S2

Input

Spread range select. Digital logic input used to select frequency deviation

(Refer Spread Deviation Table). This pin has an internal pull-up resistor.

4

GND

power

Ground Connection. Connect to system ground.

5

CLK1

Output

Low EMI 4x clock output.

6

CLK2

Output

Low EMI 4x clock output.

7

GND

power

Ground Connection. Connect to system ground.

8

XIN/CLKIN

Input

Crystal connection or external reference frequency input. It can be connected to a

15MHz fundamental mode crystal.

9

XOUT

Output

Crystal connection. If using an external reference, this pin must be left

unconnected.

10

GND

power

Ground Connection. Connect to system ground.

11

CLK3

Output

Low EMI 4x clock output.

12

CLK4

Output

Low EMI 4x clock output.

13

GND

power

Ground Connection. Connect to system ground.

14

S1

Output

Spread range select. Digital logic input used to select frequency deviation

(Refer Spread Deviation Table). This pin has an internal pull-up resistor.

15

S0

Output

Spread range select. Digital logic input used to select frequency deviation

(Refer Spread Deviation Table). This pin has an internal pull-up resistor.

16

VDD

power

Power Supply Voltage Pin. Connect to +3.3V.

VDD

S0

CLK3

GND

GND

CLK4

XOUT

XIN/CLKIN

GND

CLK2

CLK1

GND

VDD

S1

GND

S2

PCS3P2191A

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

16Pin TSSOP