TPS2010A, TPS2011A, TPS2012A, TPS2013A

POWER-DISTRIBUTION SWITCHES

SLVS189A – DECEMBER 1998 – REVISED NOVEMBER 1999

5

POST OFFICE BOX 655303

power switch

PARAMETER

TEST CONDITIONS†

MIN

TYP

MAX

UNIT

VI(IN) = 5 V,

TJ = 25°C,

IO = 1.5 A

33

36

VI(IN) = 5 V,

TJ = 85°C,

IO = 1.5 A

38

46

VI(IN) = 5 V,

TJ = 125°C,

IO = 1.5 A

44

50

VI(IN) = 3.3 V,

TJ = 25°C,

IO = 1.5 A

37

41

VI(IN) = 3.3 V,

TJ = 85°C,

IO = 1.5 A

43

52

rDS(on)

Static drain-source on-state resistance

VI(IN) = 3.3 V,

TJ = 125°C,

IO = 1.5 A

51

61

m

Ω

rDS(on)

Static drain-source on-state resistance

VI(IN) = 5 V,

TJ = 25°C,

IO = 0.18 A

30

34

m

Ω

VI(IN) = 5 V,

TJ = 85°C,

IO = 0.18 A

35

41

VI(IN) = 5 V,

TJ = 125°C,

IO = 0.18 A

39

47

VI(IN) = 3.3 V,

TJ = 25°C,

IO = 0.18 A

33

37

VI(IN) = 3.3 V,

TJ = 85°C,

IO = 0.18 A

39

46

VI(IN) = 3.3 V,

TJ = 125°C,

IO = 0.18 A

44

56

t

Rise time output

VI(IN) = 5.5 V,

CL = 1 µF,

TJ = 25°C,

RL = 10 Ω

6.1

ms

tr

Rise time, output

VI(IN) = 2.7 V,

CL = 1 µF,

TJ = 25°C,

RL = 10 Ω

8.6

ms

tf

Fall time output

VI(IN) = 5.5 V,

CL = 1 µF,

TJ = 25°C,

RL = 10 Ω

3.4

ms

tf

Fall time, output

VI(IN) = 2.7 V,

CL = 1 µF,

TJ = 25°C,

RL = 10 Ω

3

ms

† Pulse-testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account separately.

enable input ( EN )

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

VIH

High-level input voltage

2.7 V

≤ VI(IN) ≤ 5.5 V

2

V

VIL

Low-level input voltage

4.5 V

≤ VI(IN) ≤ 5.5 V

0.8

V

VIL

Low-level in ut voltage

2.7 V

≤ VI(IN) ≤ 4.5 V

0.5

V

II

Input current

EN = 0 V or EN = VI(IN)

– 0.5

0.5

µA

ton

Turnon time

CL = 100 µF, RL = 10 Ω

20

ms

toff

Turnoff time

CL = 100 µF, RL = 10 Ω

40

ms

current limit

PARAMETER

TEST CONDITIONS†

MIN

TYP

MAX

UNIT

TPS2010A

0.22

0.3

0.4

IOS

Short circuit output current

TJ = 25°C, VI = 5.5 V,

OUT connected to GND

TPS2011A

0.66

0.9

1.1

A

IOS

Short-circuit output current

OUT connected to GND,

Device enable into short circuit

TPS2012A

1.1

1.5

1.8

A

Device enable into short circuit

TPS2013A

1.65

2.2

2.7

† Pulse-testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account separately.