TPS2202, TPS2202Y

DUAL-SLOT PC CARD POWER-INTERFACE SWITCHES

FOR SERIAL PCMCIA CONTROLLERS

SLVS103A – DECEMBER 1994 – REVISED AUGUST 1995

6–2

POST OFFICE BOX 655303

AVAILABLE OPTIONS

PACKAGED DEVICES

CHIP FORM

TJ

SHINK SMALL-OUTLINE

(DB)

SMALL-OUTLINE

(DF)

CHIP FORM

(Y)

–40

°C to 150°C

TPS2202IDB

TPS2202IDF

TPS2202Y

† The DF package is only available left-end taped and reeled (indicated by the LE suffix on the device type; e.g.,

TPS2202IDFLE).

Terminal Functions

TERMINAL

I/O

DESCRIPTION

NAME

NO.

I/O

DESCRIPTION

3V

15, 16, 17

I

3-V VCC input for card power

5V

1, 2, 30

I

5-V VCC input for card power

12V

7, 24

I

12-V VPP input for card power

AVCC

9, 10, 11

O

Switched output that delivers 0 V, 3.3 V, 5 V, or high impedance

AVPP

8

O

Switched output that delivers 0 V, 3.3 V, 5 V, 12 V, or high impedance

APWR_GOOD

13

O

Logic-level power-ready output that stays low as long as AVPP is within limits.

BVCC

20, 21, 22

O

Switched output that delivers 0 V, 3.3 V, 5 V, or high impedance

BVPP

23

O

Switched output that delivers 0 V, 3.3 V, 5 V, 12 V, or high impedance

BPWR_GOOD

19

O

Logic-level power-ready output that stays low as long as BVPP is within limits.

CLOCK

4

I

Logic-level clock for serial data word

DATA

3

I

Logic-level serial data word

GND

12

Ground

LATCH

5

I

Logic-level latch for serial data word

NC

6, 14, 26,

27, 28, 29

No internal connection

OC

18

O

Logic-level overcurrent reporting output that goes low when an overcurrent condition exists.

VDD

25

5-V power to chip