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TLV2464CPWRG4 数据表(PDF) 25 Page - Texas Instruments |
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TLV2464CPWRG4 数据表(HTML) 25 Page - Texas Instruments |
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25 / 54 page ![]() TLV2460, TLV2461, TLV2462, TLV2463, TLV2464, TLV2465, TLV246xA FAMILY OF LOW POWER RAILTORAIL INPUT/OUTPUT OPERATIONAL AMPLIFIERS WITH SHUTDOWN SLOS220J − JULY 1998 − REVISED FEBRUARY 2004 25 WWW.TI.COM PARAMETER MEASUREMENT INFORMATION _ + Rnull RL CL Figure 48 APPLICATION INFORMATION driving a capacitive load When the amplifier is configured in this manner, capacitive loading directly on the output will decrease the device’s phase margin leading to high frequency ringing or oscillations. Therefore, for capacitive loads of greater than 10 pF, it is recommended that a resistor be placed in series (RNULL) with the output of the amplifier, as shown in Figure 49. A minimum value of 20 Ω should work well for most applications. CLOAD RF Input Output RG RNULL _ + Figure 49. Driving a Capacitive Load offset voltage The output offset voltage, (VOO) is the sum of the input offset voltage (VIO) and both input bias currents (IIB) times the corresponding gains. The following schematic and formula can be used to calculate the output offset voltage: V OO + V IO 1 ) R F R G " I IB ) R S 1 ) R F R G " I IB– R F + − VI + RG RS RF IIB− VO IIB+ Figure 50. Output Offset Voltage Model |
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