TSB14C01A, TSB14C01AI, TSB14C01AM

5-V IEEE 1394-1995 BACKPLANE TRANSCEIVER/ARBITER

SGLS107A – FEBRUARY 1999 – REVISED NOVEMBER 1999

18

POST OFFICE BOX 655303

PRINCIPLES OF OPERATION

backplane phy connection

Within the backplane environment the serial bus is implemented with a pair of signals (STRB and DATA). The

topology is a simple pair of bussed signals as shown in Figure 8.

PHY

Node

Module

PHY

Node

Module

PHY

Node

Module

PHY

Node

PHY

Node

Module

PHY

Node

Backplane Chassis

STRB

DATA

NOTE A: On a given bus, there can be as many as 63 nodes. There is no restriction on the distribution of nodes

throughout modules on the bus. When more than one node occupies a module, they must share the

same transceivers.

Figure 8. Backplane Topology

The backplane environment can be implemented with a number of different interface technologies. These

include, but are not limited to: TTL for industry-standard transistor-transistor logic, BTL for backplane

transceiver logic as defined by IEEE Std 1194.1, and ECL for emitter-coupled logic.

In addition to the requirements specified by the application environment, the physical media of the serial bus

should meet the requirements defined for media attachment, media signal interface, and media signal timing.

Timing requirements must be met over the ranges specified in the application environment. These include

temperature ranges, voltage ranges, and manufacturing tolerances.