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LTC4063 数据表(PDF) 14 Page - Linear Technology |
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LTC4063 数据表(HTML) 14 Page - Linear Technology |
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14 / 20 page ![]() 14 LTC4063 4063fb With User-Selectable Charge Termination, the SmartStart feature is disabled; when the charger is powered on or enabled, the LTC4063 automatically begins charging, re- gardless of the battery voltage. Figure 5 describes charger operation when User-Selectable Charge Termination is used. Programming C/10 Current Detection/Termination In most cases, an external resistor, RDET, is needed to set the charge current detection threshold, IDETECT. However, when setting IDETECT to be 1/10th of ICHG, the IDET pin can be connected directly to the PROG pin. This reduces the component count, as shown in Figure 6. When PROG and IDET are connected in this way, the full- scale charge current, ICHG, is programmed using a differ- ent equation: R V I I V R PROG CHG CHG PROG == 500 500 , Stability Considerations The battery charger constant voltage mode feedback loop is stable without any compensation provided a battery is connected. However, a 1 µF capacitor with a 1Ω series resistor to GND is recommended at the BAT pin to keep ripple voltage low when the battery is disconnected. When the charger is in constant current mode, the PROG pin is in the feedback loop, not the battery. The constant current stability is affected by the impedance at the PROG pin. With no additional capacitance on the PROG pin, the charger is stable with program resistor values as high as 10k; however, additional capacitance on this node reduces the maximum allowed program resistor. For the LDO regulator, a capacitor (COUT) must be con- nected from OUT to GND to ensure regulator loop stability. It is recommended that low ESR capacitors be used for COUT to reduce noise on the output of the linear regulator. COUT must be ≥2µF for best performance. APPLICATIO S I FOR ATIO CHARGE MODE FULL CURRENT 4063 F05 TRICKLE CHARGE MODE 1/10 FULL CURRENT BAT > 2.9V BAT < 2.9V 2.9V < BAT CHGEN = 5V OR UVLO CONDITION SHUTDOWN MODE ICC DROPS TO 35µA CHRG STATE: Hi-Z CHRG STATE: PULL-DOWN POWER ON CHGEN = 0V OR UVLO CONDITION STOPS CHRG STATE: PULL-DOWN IF IBAT > IDETECT Hi-Z IF IBAT < IDETECT Figure 5. State Diagram of a Charger Cycle Using User Termination + VCC PROG IDET VIN BAT 500mA TIMER RDET 2k RPROG 2k LTC4063 GND + VCC PROG IDET VIN 4063 F06 BAT 500mA TIMER RPROG 1k LTC4063 GND Figure 6. Two Circuits that Charge at 500mA Full-Scale Current and Terminate at 50mA |
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