TSV611 datasheet(7/16 Pages) STMICROELECTRONICS

7 / 16 page

TSV611, TSV612

Electrical characteristics

Doc ID 15768 Rev 1

7/16

Table 5.

VCC+ = +5 V, VCC- = 0 V, Vicm = VCC/2, Tamb = 25° C, RL connected to VCC/2

(unless otherwise specified)

Symbol

Parameter

Min.

Typ.

Max.

Unit

DC performance

Vio

Offset voltage

TSV61x

TSV61xA

Tmin<Top<Tmax TSV61x

Tmin<Top<TmaxTSV61xA

DVio

Input offset voltage drift

μV/°C

Iio

Input offset current

110

Tmin. < Top < Tmax.

100

Iib

Input bias current

110

Tmin. < Top < Tmax.

100

CMR

Common mode rejection

ratio

20 log (

ΔVic/ΔVio)

0 V to 5 V, Vout = 2.5 V

SVR

Supply voltage rejection

ratio 20 log (

ΔVcc/ΔVio)

Vcc = 1.8 to 5 V

Avd

Large signal voltage gain

RL =10kΩ, Vout = 0.5 V to

4.5 V

tbd

VOH

High level output voltage

RL =10kΩ

Tmin. < Top < Tmax.

VOL

Low level output voltage

RL =10kΩ

Tmin. < Top < Tmax.

335

Iout

Isink

Vo = 5 V

tbd

Isource

Vo = 0 V

tbd

ICC

Supply current (per

operator)

No load, Vout =2.5 V

µA

Tmin. < Top < Tmax.

tbd

µA

AC performance

GBP

Gain bandwidth product

RL =10kΩ, CL =20pF,

f=100kHz, Av = 1

120

kHz

Unity gain frequency

RL = 10 kΩ, CL =20pF,

Av = 1

109

kHz

φm

Phase margin

RL = 10 kΩ, CL =20pF,

Av = 1

Degrees

Gain margin

RL = 10 kΩ, CL =20pF,

Av = 1

Slew rate

RL =10kΩ, CL = 20 pF,

AV =1

0.034

μs

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