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LTM8025EVPBF 数据表(PDF) 14 Page - Linear Technology |
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LTM8025EVPBF 数据表(HTML) 14 Page - Linear Technology |
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14 / 20 page ![]() LTM8025 14 8025f BIAS AUX VOUT VIN GND GND 8025 F03 GND THERMAL VIAS TO GND RT RADJ PGOOD CIN COUT SYNC SHDN APPLICATIONS INFORMATION Figure 2. The Input Diode Prevents a Shorted Input from Discharging a Backup Battery Tied to the Output. It Also Protects the Circuit from a Reversed Input. The LTM8025 Runs Only When the Input is Present. high level of integration, you may fail to achieve specified operation with a haphazard or poor layout. See Figure 3 for a suggested layout. Ensure that the grounding and heatsinking are acceptable. 1. Place the RADJ and RT resistors as close as possible to their respective pins. 2. Place the CIN capacitor as close as possible to the VIN and GND connection of the LTM8025. 3. Place the COUT capacitor as close as possible to the VOUT and GND connection of the LTM8025. 4. Place the CIN and COUT capacitors such that their ground current flow directly adjacent or underneath the LTM8025. 5. Connect all of the GND connections to as large a copper pour or plane area as possible on the top layer. Avoid breaking the ground connection between the external components and the LTM8025. 6. For good heatsinking, use vias to connect the GND cop- per area to the board’s internal ground planes. Liberally distribute these GND vias to provide both a good ground connection and thermal path to the internal planes of the printed circuit board. Pay attention to the location and density of the thermal vias in Figure 3. The LTM8025 can benefit from the heat-sinking afforded by vias that connect to internal GND planes at these locations, due to their proximity to internal power handling components. The optimum number of thermal vias depends upon the printed circuit board design. For example, a board Figure 3. Layout Showing Suggested External Components, GND Plane and Thermal Vias. might use very small via holes. It should employ more thermal vias than a board that uses larger holes. Hot-Plugging Safely The small size, robustness and low impedance of ceramic capacitors make them an attractive option for the input bypass capacitor of LTM8025. However, these capacitors can cause problems if the LTM8025 is plugged into a live supply (see Linear Technology Application Note 88 for a complete discussion). The low loss ceramic capacitor combined with stray inductance in series with the power source forms an underdamped tank circuit, and the volt- age at the VIN pin of the LTM8025 can ring to more than twice the nominal input voltage, possibly exceeding the LTM8025’s rating and damaging the part. If the input supply is poorly controlled or the user will be plugging the LTM8025 into an energized supply, the input network should be designed to prevent this overshoot. This can be accomplished by installing a small resistor in series to VIN, but the most popular method of controlling input voltage overshoot is to add an electrolytic bulk capacitor to the VIN net. This capacitor’s relatively high equivalent series resistance damps the circuit and eliminates the voltage overshoot. The extra capacitor improves low frequency ripple filtering and can slightly improve the efficiency of the circuit, though it is likely to be the largest component in the circuit. VIN RUN/SS RT ADJ VOUT GND 8025 F02 LTM8025 VIN VOUT AUX BIAS SYNC |
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