SH7262 datasheet(39/45 Pages) RENESAS

39 / 45 page

SH7262/SH7264 Group

High-speed Read/Write Serial Flash Memory

Using the Renesas Serial Peripheral Interface

REJ06B0889-0100/Rev.1.00

June 2009

Page 39 of 45

3.21

Sample Program Listing "serial_flash.c" (18/19)

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/* ==== MISO (read data) ==== */

RSPI0.SPCMD0.BIT.CPOL= 0;

/* RSPCK when idling is 0 */

RSPI0.SPCMD0.BIT.CPHA= 1;

/* Latches data on even (falling) edge */

RSPI0.SPBFCR.BYTE

= 0xC0u;

/* Resets buffer */

RSPI0.SPBFCR.BYTE

= 0x00u;

RSPI0.SPDCR.BIT.SPLW = 3;

/* Access width to the SPDR register: 32-bit */

RSPI0.SPCMD0.BIT.SPB = 3;

/* Transfer data length: 32-bit */

/* ---- Enables the DMA transfer ---- */

RSPI0.SPCR.BIT.SPRIE =

/* Enable an interrupt (for DMA transfer) */

DMAC.CHCR0.LONG

0x00000000; /* Disables the DMA transfer */

DMAC.DMARS0.WORD =

0x0052u;

/* RSPI0 Rx */

DMAC.DMAOR.WORD

0x0001u;

/* Enables all DMA transfers */

DMAC.SAR0.LONG

(unsigned long)&(RSPI0.SPDR.BYTE);

DMAC.DAR0.LONG

(unsigned long)rd;

/* Transfer destination address */

DMAC.DMATCR0.LONG

rd_sz >> 2;

/* Transfer size */

DMAC.CHCR0.LONG

(unsigned long)0x00004811;

/* Transfer size (long),

enables the DMA transfer */

/* ---- Receives data ---- */

RSPI0.SPDCR.BIT.TXDMY = 1;

/* Enables to transmit the dummy data */

while(DMAC.CHCR0.BIT.TE == 0){

/* Waits for the DMA transfer end */

/* wait */

}

RSPI0.SPDCR.BIT.TXDMY = 0;

/* Disables to transmit the dummy data */

DMAC.CHCR0.LONG

0x00000000ul;

/* Disables the DMA0 */

io_wait_tx_end();

/* Waits for transfer end */

/* ==== Restores the SPI to default setting ==== */

RSPI0.SPCR.BIT.SPE = 0;

RSPI0.SPDCR.BIT.SPLW = 1;

/* Access width to the SPDR register: 8-bit */

RSPI0.SPCMD0.BIT.SPB = 7;

/* Transfer data length: 8-bit */

}

#endif

/* SF_USE_DMAC */

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