UCC5630A

DESCRIPTION

The UCC5630A Multimode SCSI Terminator provides a smooth transition

into the LVD SCSI Parallel Interface (SPI-2, SPI-3, SPI-4). It automatically

senses the bus, via DIFFB, and switches the termination to either single

ended (SE) or low voltage differential (LVD) SCSI, dependent on which

type of devices are connected to the bus. The UCC5630A can not be used

on a HVD, EIA485, differential SCSI bus. If the UCC5630A detects a HVD

SCSI device, it switches to a high impedance state.

The Multimode terminator contains all functions required to terminate and

auto detect and switch modes for SPI-2, SPI-3 and SPI-4 bus architectures.

Single Ended and Differential impedances and currents are trimmed for

maximum effectiveness. Fail Safe biasing is provided to insure signal integ-

rity. Device/Bus type detection circuitry is integrated into the terminator to

provide automatic switching of termination between single ended and LVD

SCSI and a high impedance for HVD SCSI. The multimode function pro-

vides all the performance analog functions necessary to implement SPI-2

termination in a single monolithic device.

The UCC5630A is offered in a 36 pin SSOP package, as well as a 48 pin

LQFP package for a temperature range of 0°C to 70°C.

Multimode SCSI 9 Line Terminator

FEATURES

• Auto Selection Single Ended (SE) or

Low Voltage Differential (LVD)

Termination

• Meets SCSI-1, SCSI-2, Ultra2 (SPI-2

LVD), Ultra3, Ultra160 (SPI-3) and

Ultra320 (SPI-4) Standards

• 2.7V to 5.25V Operation

• Differential Failsafe Bias

• Thermal packaging for low junction

temperature and better MTBF

• Master/Slave Input

• Supports Active Negation

• 3pF Channel Capacitance

SLUS322C - SEPTEMBER 1999 - REVISED MARCH 2002

LVD REF 1.25V

17

DISCNCT

REG

L1+

L9–

L9+

SOURCE/SINK REGULATOR

REF 1.3V

20

DIFSENS

–15mA

≤ I

50

µA ≤ I

HIPD

LVD

SE

21

DIFFB

0.6V

2.15V

52.5

32

52.5

31

110

1

SE REF 2.7V

SE GND SWITCH

36

TRMPWR

18

GND

9

L1–

124

52.5

5

52.5

4

110

124

10

µA

1.3V

(NOISE LOAD)

SE GND SWITCH

56mV

–+

+–

–+

56mV

56mV

56mV

+–

MODE

ALL

SWITCHES

SE

LVD

HIPD

DISCNCT

UP

DOWN

OPEN

OPEN

35

HIPD

34

LVD

33

SE

19

ENABLE

SWITCHES

MSTR/SLV

PATENTED CIRCUIT DESIGN

8

HS/GND

10

27

26

28

BLOCK DIAGRAM

UDG-98192

Note: Indicated pinout is for 36 pin SSOP package.