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SPT9713 数据表(PDF) 3 Page - Cadeka Microcircuits LLC.

部件名 SPT9713
功能描述  12-BIT, 100 MWPS TTL D/A CONVERTER
PDF  7 Pages
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制造商  CADEKA [Cadeka Microcircuits LLC.]
网页  http://www.cadeka.com
标志 CADEKA - Cadeka Microcircuits LLC.

SPT9713 数据表(HTML) 3 Page - Cadeka Microcircuits LLC.

  SPT9713 Datasheet HTML 1Page - Cadeka Microcircuits LLC. SPT9713 Datasheet HTML 2Page - Cadeka Microcircuits LLC. SPT9713 Datasheet HTML 3Page - Cadeka Microcircuits LLC. SPT9713 Datasheet HTML 4Page - Cadeka Microcircuits LLC. SPT9713 Datasheet HTML 5Page - Cadeka Microcircuits LLC. SPT9713 Datasheet HTML 6Page - Cadeka Microcircuits LLC. SPT9713 Datasheet HTML 7Page - Cadeka Microcircuits LLC.  
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3
2/15/01
SPT9713
TEST LEVEL CODES
All electrical characteristics are subject to the
following conditions:
All parameters having min/max specifications
are guaranteed. The Test Level column indi-
cates the specific device testing actually per-
formed during production and Quality Assur-
ance inspection. Any blank section in the data
column indicates that the specification is not
tested at the specified condition.
LEVEL
TEST PROCEDURE
I
100% production tested at the specified temperature.
II
100% production tested at TA = +25 °C, and sample tested at the
specified temperatures.
III
QA sample tested only at the specified temperatures.
IV
Parameter is guaranteed (but not tested) by design and characteri-
zation data.
V
Parameter is a typical value for information purposes only.
VI
100% production tested at TA = +25 °C. Parameter is guaranteed
over specified temperature range.
ELECTRICAL SPECIFICATIONS
TA = TMIN – TMAX, VCC = +5.0 V, VEE = –5.2 V, RSET = 7.5 kΩ, Control Amp In = Ref Out, VOUT = 0 V, unless otherwise specified.
TEST
TEST
SPT9713A
SPT9713B
PARAMETERS
CONDITIONS
LEVEL
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
Power Supply Requirements
Positive Supply Voltage
IV
4.75
5.0
+5.25
4.75
5.0
+5.25
V
Negative Supply Voltage
IV
–5.46
–5.2
–4.94
–5.46
–5.2
–4.94
V
Positive Supply Current (+5.0 V)
+25 °C
I
8
14
8
14
mA
Full Temp.
VI
16
16
mA
Negative Supply Current (–5.2 V)
+25 °C
I
115
140
115
140
mA
Full Temp
VI
148
148
mA
Nominal Power Dissipation
V
640
640
mW
Power Supply Rejection Ratio
±5% of VEE and VCC
I
30
100
30
100
µA/V
External Ref, +25 °C
Voltage Input and Control
Reference Input Impedance
+25 °C
V
3
3
k
Ref. Multiplying Bandwidth
+25 °C
V
40
40
MHz
Internal Reference Voltage
VI
–1.15 –1.20 –1.25
–1.15 –1.20 –1.25
V
Internal Reference Voltage Drift
Full
V
50
50
ppm/°C
Amplifier Input Impedance
+25 °C
V
3
3
M
Amplifier Input Bandwidth
+25 °C
V
1
1
MHz
Digital Inputs
Logic 1 Voltage
Full Temp.
VI
2.0
2.0
V
Logic 0 Voltage
Full Temp.
VI
0.8
0.8
V
Logic 1 Current
Full Temp.
VI
20
20
µA
Logic 0 Current
Full Temp.
VI
600
600
µA
Input Capacitance
+25 °C
V
3
3
pF
Input Setup Time – tS
+25 °C
IV
3
2
3
2
ns
Input Setup Time – tS
Full Temp.
IV
3.5
3.5
ns
Input Hold Time – tH
+25 °C
IV
0.5
0
0.5
0
ns
Input Hold Time – tH
Full Temp.
IV
0.5
0.5
ns
Latch Pulse Width – tPWL, tPWH
+25 °C
IV
5.0
4.0
5.0
4.0
ns



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