PRODUCT SPECIFICATION

TMC2011A/2111A

3

Pin Descriptions – TMC2011A

Pin Name

Pin Number

Pin Function Description

DIP

PLCC

Power

78

Supply Voltage. The TMC2011A and operates from a single +5V supply.

All power and ground lines must be connected.

GND

18

21,22

Ground. The TMC2011A operates from a single +5V supply. All power

and ground lines must be connected.

Data Inputs

12,11,10,

9,4,3,2,1

14,13,12,

10,5,4,3,2

Data Input. Eight inputs are provided for the data, which pass through the

shift register unchanged. The eight inputs on the TMC2011A are divided

into two groups of four bits to allow mixed delay operation. The lengths of

these two groups are different when the Mode Control (MC) is HIGH (see

Table 1). When MC is LOW both groups have equal delays.

Data Outputs

13,14,15,

16,21,22,

23,24

15,16,17,

18,26,27,

28,1

Data Output. The outputs of the shift register are delayed relative to the

input signals. The amount of the delay is programmable (see Table 1).

leading edge of CLK. This allow the data to be latched into circuits with

non-zero hold time requirements.

Controls

CLK

8

9

Master Clock. All inputs and outputs are synchronous and operate from a

single master clock. All operations occur on the rising edge of the master

clock.

19,20,6,5

23,24,7,6

Length Select. The length select input is used to determine the register

after the clock edge after it is input to the device (see Timing Diagram).

Delay lengths are specified in Table 1.

MC

17

20

Mode Control. The Mode Control is used to select the special 4-bit wide

eight bits have equal delays as specified by the length select.