PI2123 datasheet(14/20 Pages) VICOR

14 / 20 page

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PI2123

Rev 1.0

Page 14 of 20

VC voltage lower than required to drive the gate of

the internal MOSFET.

Select the value of Rbias using the following

equations:

max

min

Vaux

Rbias

clamp

−

Rbias maximum power dissipation:

Rbias

Vaux

clamp

Rbias

max

)

(

−

Where:

min

Vaux

: Vaux minimum voltage

max

Vaux

: Vaux maximum voltage

Clamp

: Controller clamp voltage, 15.5V

max

: Controller maximum bias current, use

4.2mA

Example:

Vaux 20V to 30V

−

Vaux

Rbias

clamp

max

min

Rbias

Vaux

clamp

Rbias

196

)

(

)

(

max

−

Internal N-Channel MOSFET BVdss:

The

PI2123’s

internal

N-Channel

MOSFET

breakdown voltage (BVdss) is rated for 15V at 25°C

and will degrade at -40°C to 14.4V, refer to Figure

10. In an application when the MOSFET is turned

off due to a reverse fault, the series parasitic

elements in the circuit may contribute to the

MOSFET being exposed to a voltage higher than its

voltage rating.

In Active ORing applications when one of the input

power sources is shorted, a large reverse current is

sourced from the circuit output through the

MOSFET. Depending on the output impedance of

the system, the reverse current may reach over 60A

in some conditions before the MOSFET is turned off.

Such high current conditions will store energy even

in a small parasitic element. For example: a 1nH

parasitic inductance with 60A reverse current will

generate 1.8µJ (½Li

2). When the MOSFET is turned

off, the stored energy will be released and produce a

high negative voltage ringing at the MOSFET

source. At the same time the energy stored at the

drain side of the internal MOSFET will be released

and produce a voltage higher than the load voltage.

This event will create a high voltage difference

between the drain and source of the MOSFET. To

reduce the magnitude of the ringing voltage, add a

ceramic capacitor very close to the source that can

react to the voltage ringing frequency and another

capacitor close to the drain. Recommended values

for the ceramic capacitors are 1µF, refer to C5 and

C7 in Figure 23.

Slave

For a high current application where one PI2123 can

not handle the total load current, multiple PI2123’s

can be paralleled in a master/slave configuration to

support the total current per input.

In the

Master/Slave mode, one PI2123 is configured as the

master and the rest are configured as slaves. The

slave ( SL ) pin of the master unit will act as an

output driving the units configured in slave mode.

The SL pins of the slave units will act as inputs

under the control of the master.

Tie the BK pin to VC to configure the unit in slave

mode.

Power dissipation:

In active ORing circuits the MOSFET is always on in

steady state operation and the power dissipation is

derived from the total source current and the on-

state resistance of the internal MOSFET.

The PI2123 internal MOSFET power dissipation can

be calculated with the following equation:

)

(

Rds

MOSFET

∗

Where:

: Source Current

Rds(on) : MOSFET on-state resistance

Note:

Calculate with Rds(on) at maximum MOSFET

temperature because Rds(on) is

temperature

dependent, Refer to figure 11 for normalized

Rds(on) values over temperature. PI2123 nominal

Rds(on) at 25°C is 3mΩ and will increase by ~40%

at 125°C junction temperature.

The Junction Temperature rise is a function of power

dissipation and thermal resistance.

)

(

Rds

Rth

Trise

MOSFET

∗

Where:

Rth : Junction-to-Ambient thermal resistance

(54°C/Watt)

(3)

This may require iteration to get to the final junction

temperature. Figures 13, 14 and 17 show the

PI2123 internal MOSFET final junction temperature

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