ADA4691-2/ADA4692-2

Rev. A | Page 15 of

16

SHUTDOWN OPERATION

INPUT PIN CHARACTERISTICS

The ADA4691-2 has a classic CMOS logic inverter input for

each shutdown pin, as shown in Figure 50.

TIME (400µs/DIV)

SDA, B

DUT OUTPUT

P-CHANNEL

INPUT

OUTPUT

N-CHANNEL

Figure 50. CMOS Inverter

With slowly changing inputs, the top transistor and bottom

transistor may be slightly on at the same time, increasing the

supply current. This can be avoided by driving the input with a

digital logic output having fast rise and fall times. Figure 51

through Figure 53 show the supply current for both sections

switching simultaneously with rise times of 1 μs, 10 μs, and

1 ms. Clearly, the rise and fall times should be faster than 10 us.

Using an RC time constant to enable/disable shutdown is not

recommended.

TIME (400µs/DIV)

SDA, B

DUT OUTPUT

Figure 51. Shutdown Pin Rise Time = 1 μs

TIME (400µs/DIV)

SDA, B

DUT OUTPUT

Figure 52. Shutdown Pin Rise Time = 10 μs

Figure 53. Shutdown Pin Rise Time = 1 ms

INPUT THRESHOLD

The input threshold is approximately 1.2 V above the V− pin

when operating on ground and +5 V, and 0.9 V when operating

on 2.7 V (see Figure 54 and Figure 55). The threshold is rela-

tively stable over temperature. For operation on split supplies,

the logic swing may have to be level shifted.

500

450

400

350

300

250

200

150

100

50

0

05.0

4.5

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

SD VOLTAGE (V)

ADA4691-2

300

250

200

150

100

.7

50

0

02

2.4

2.1

1.8

1.5

1.2

0.9

0.6

0.3

SD VOLTAGE (V)

ADA4691-2