ADM2914

Rev. 0 | Page 9 of 16

MONITORING PIN CONNECTIONS

Positive Voltage Monitoring Scheme

When monitoring a positive supply, the desired nominal

0.5V

UVx

VHx

VLx

OVx

ADM2914

Figure 17. Positive Undervoltage/Overvoltage Monitoring Configuration

Figure 17 illustrates the positive voltage monitoring input connec-

corresponding VHx pin, and the low-side voltage is connected

to the corresponding VLx pin.

To trigger an overvoltage condition, the low-side voltage (in this

V

5

.

0

=













+

+

=

Z

Y

X

Z

OV

PL

R

R

R

R

V

V

Also,

M

M

Z

Y

X

I

V

R

R

R

=

+

+

overvoltage monitor, is calculated using the following equation:

( )

M

OV

M

Z

I

V

V

R

)

5

.

0

(

=

(1)

To trigger the undervoltage condition, the high-side voltage,

V

5

.

0

=













+

+

+

=

Z

Y

X

Z

Y

UV

PH

R

R

R

R

R

V

V

( )

M

UV

M

Y

R

I

V

V

R

−

=

)

5

.

0

(

(2)

equation:

( )

( )

Y

Z

M

M

X

R

R

I

V

R

−

−

=

(3)

Negative Voltage Monitoring Scheme

Figure 18 shows the circuit configuration for negative supply

voltage monitoring. To monitor the negative voltage, a 1 V

reference voltage is required to connect to the end node of the

voltage divider circuit. This reference voltage is generated

internally and is output through the REF pin.

0.5V

OVx

VHx

VLx

UVx

REF

ADM2914

Figure 18. Negative Undervoltage/Overvoltage Monitoring Configuration

The equations described in the Positive Voltage Monitoring

Scheme section need some minor modifications for use with

negative voltage monitoring. The 1 V reference voltage is added

to the overall voltage drop; it must therefore be subtracted from

To monitor a negative voltage level, the resistor divider circuit

divides the voltage differential level between the 1 V reference

voltage and the negative supply voltage into high-side voltage,

Monitoring Example section for more information.