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ADP1612ARMZ-R7 数据表(PDF) 22 Page - Analog Devices |
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ADP1612ARMZ-R7 数据表(HTML) 22 Page - Analog Devices |
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22 / 28 page  ADP1612/ADP1613 Rev. A | Page 22 of 28 SEPIC CONVERTER ADP1613 6 3 7 8 5 2 1 4 VIN EN FREQ SS SW FB COMP GND ON OFF VOUT = 20V VIN = 3.3V TO 5.5V L1 10µH CSS 33nF COUT 10µF CCOMP 1200pF RCOMP 8.2k Ω R1 150k Ω R2 10k Ω D1 3A, 40V CIN 10µF L1: DO3316P-103ML D1: MBRA340T3G R1: RC0805JR-07150KL R2: CRCW080510K0FKEA RCOMP: RC0805JR-078K2L CCOMP: ECL-2VB1H122K CIN: GRM21BR61C106KE15L COUT: GRM32DR71E106KA12L CSS: ECJ-2VB1H333K Figure 71. ADP1613 Step-Up Regulator Configuration VOUT = 20 V, fSW = 1.3 MHz 100 90 80 70 60 50 40 30 20 1 10 100 1k LOAD CURRENT (mA) VOUT = 20V fSW = 1.3MHz TA = 25°C ADP1613 VIN = 3.3V VIN = 4.2V VIN = 5.0V VIN = 5.5V Figure 72. ADP1613 Efficiency vs. Load Current VOUT = 20 V, fSW = 1.3 MHz VOUT = 20V fSW = 1.3MHz T TIME (100µs/DIV) OUTPUT VOLTAGE (200mV/DIV) AC-COUPLED LOAD CURRENT (50mA/DIV) Figure 73. ADP1613 50 mA to 150 mA Load Transient (VIN = 5 V) VOUT = 20 V, fSW = 1.3 MHz The circuit in Figure 74 shows the ADP1612/ADP1613 in a single-ended primary inductance converter (SEPIC) topology. This topology is useful for an unregulated input voltage, such as a battery-powered application in which the input voltage can vary between 2.7 V to 5 V and the regulated output voltage falls within the input voltage range. The input and the output are dc isolated by a coupling capacitor (C1). In steady state, the average voltage of C1 is the input voltage. When the ADP1612/ADP1613 switch turns on and the diode turns off, the input voltage provides energy to L1 and C1 provides energy to L2. When the ADP1612/ADP1613 switch turns off and the diode turns on, the energy in L1 and L2 is released to charge the output capacitor (COUT) and the coupling capacitor (C1) and to supply current to the load. ADP1612/ ADP1613 6 3 7 8 5 2 1 4 VIN EN FREQ SS SW FB COMP GND ON OFF VOUT = 3.3V VIN = 2.0V TO 5.5V L1 DO3316P 4.7µH CIN 10µF CSS COUT 10µF C1 10µF RCOMP 82k Ω CCOMP 220pF R1 16.9k Ω L2 DO3316P 4.7µH R2 10k Ω MBRA210LT 2A, 10V Figure 74. SEPIC Converter TFT LCD BIAS SUPPLY Figure 75 shows a power supply circuit for TFT LCD module applications. This circuit has +10 V, −5 V, and +22 V outputs. The +10 V is generated in the step-up configuration. The −5 V and +22 V are generated by the charge-pump circuit. During the step-up operation, the SW node switches between +10 V and ground (neglecting the forward drop of the diode and on resistance of the switch). When the SW node is high, C5 charges up to +10 V. When the SW node is low, C5 holds its charge and forward-biases D8 to charge C6 to −10 V. The Zener diode (D9) clamps and regulates the output to −5 V. The VGH output is generated in a similar manner by the charge- pump capacitors, C1, C2, and C4. The output voltage is tripled and regulated down to 22 V by the Zener diode, D5. |
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