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ADP2118ACPZ-R7 数据表(PDF) 16 Page - Analog Devices

部件名 ADP2118ACPZ-R7
功能描述  3 A, 1.2 MHz/600 kHz High Efficiency Synchronous Step-Down DC-to-DC Converter
PDF  24 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADP2118ACPZ-R7 数据表(HTML) 16 Page - Analog Devices

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ADP2118
Rev. 0 | Page 16 of 24
APPLICATIONS INFORMATION
This section describes the external components selection for the
ADP2118. The typical application circuit is shown in Figure 41.
RTOP
10k
RBOT
10k
R2
10k
R1
10
SYNC/MODE
FREQ
TRK
FB
PVIN
ADP2118
SW
SW
SW
1
2
3
4
12
11
10
9
CIN
100µF
X5R,
6.3V
COUT
100µF
X5R,
6.3V
C1
0.1µF
VIN
5V
VOUT
1.2V
3A
L
1µH
16
15
14
13
5
6
7
8
Figure 41. Application Circuit
OUTPUT VOLTAGE SELECTION
The output voltage of the adjustable version of the ADP2118
can be set by an external resistive voltage divider by using the
following equation to set the voltage:


+
×
=
BOT
TOP
OUT
R
R
V
1
6
.
0
To limit output voltage accuracy degradation due to FB bias
current (0.1 µA maximum) to less than 0.5% (maximum),
ensure that RBOT is less than 30 kΩ.
INDUCTOR SELECTION
The inductor value is determined by the operating frequency,
input voltage, output voltage, and ripple current. Using a small
inductor leads to larger inductor current ripple and provides
fast transient response but degrades efficiency, whereas a large
inductor value leads to small current ripple and good efficiency
but slow transient response. As a guideline, the inductor current
ripple, ΔIL, is typically set to 1/3 of the maximum load current
trade-off between the transient response and efficiency. The
inductor can be calculated using the following equation:
(
)
S
L
OUT
IN
f
I
D
V
V
L
×
×
=
where:
VIN is the input voltage.
VOUT is the output voltage.
ΔIL is the inductor current ripple.
D is the duty cyle.
IN
OUT
V
V
D =
The ADP2118 uses slope compensation in the current loop to
prevent subharmonic oscillations when the duty cycle is larger
than 50%. The internal slope compensation limits the minimum
inductor value.
The negative current limit (−0.9 A) also limits the minimum
inductor value. The inductor current ripple (ΔIL) calculated by
the selected inductor should not exceed 1.8 A.
The peak inductor current should be kept below the peak
current limit threshold value and can be calculated as
2
L
O
PEAK
I
I
I
+
=
Ensure that the rms current of the selected inductor is greater
than the maximum load current and that its saturation current
is greater than the peak current limit of the converter.
OUTPUT CAPACITOR SELECTION
The output voltage ripple, load step transient, and loop stability
determine the output capacitor selection.
The output ripple is determined by the ESR and the
capacitance.


×
×
+
×
=
S
OUT
L
OUT
f
C
ESR
I
V
8
1
The load transient response depends on the inductor, output
capacitor, and the control loop.
The ADP2118 has integrated loop compensation for simple
power design. Table 5 and Table 6 show the typical recom-
mended inductors and capacitors for the ADP2118. X5R or X7R
ceramic capacitors are highly recommended.
Table 5. Recommended L and COUT Value at fS = 1.2 MHz
VIN (V)
VOUT (V)
L (µH)
COUT (µF)
3.3
1.0
1
100 + 47
3.3
1.2
1
100
3.3
1.5
1
100
3.3
1.8
1
100
3.3
2.5
1
100
5
1.0
1
100 + 47
5
1.2
1
100
5
1.5
1
100
5
1.8
1
100
5
2.5
1
100
5
3.3
1
100



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