Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (50)668-7000 • Fax (50)668-707 • www.exar.com SP233A,30A,32A_00_05308

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DESCRiPTion

DETAiLED DESCRiPTion

The SP233A, SP30A and SP32A devices

are a family of line driver and receiver pairs that

meet the EIA/TIA-232 and V.28 serial commu-

nication protocols. These devices are pin-to-pin

compatible with popular industry standards. The

SP233A, SP30A and SP32A devices offer a

20kbps data rate, 0V/

board charge pump that operates from a single

5V supply using 0.

ESD tolerance has been improved on these de-

vices to +/-2kV Human Body Model.

The SP233A device provides internal charge

pump capacitors. The SP30A provides an ON/

OFF input that simultaneously disables the in-

ternal charge pump circuit and puts all transmit-

ter and receiver outputs into a high impedance

state. The SP32A is identical to the SP30 but

with seperate tri-state and shutdown inputs

Theory of operation

The SP233A, SP30A and SP32A devices are

made up of three basic circuit blocks: . Drivers,

2. Receivers, and 3. charge pump.

Drivers

The drivers are inverting level transmitters that

convert TTL or CMOS logic levels to EIA/TIA-

232 levels with an inverted sense relative to the

input logic levels. Typically, the driver output

voltage swing is +/-9V. Even under worst case

loading conditions of 3kOhms and 2500pF, the

driver output is guaranteed to be +/-5.0V mini-

mum, thus satisfying the RS-232 specification.

The driver outputs are protected against infinite

short-circuits to ground without degradation in

reliability.

The drivers can guarantee output data rates of

20kbps under worst case loading of 3k ohms

and 2500pF.

The Slew rate of the driver output is internally

limited to 30V/

dards (EIA-232F). Additionally, the driver out-

puts LOW to HIGH transition meets the mon-

tonic output requirements of the standard.

Receivers

The receivers convert EIA/TIA-232 signal levels

to TTL or CMOS logic output levels. Since the

input is usually from a transmission line, where

long cable length and system interference can

degrade the signal, the inputs have a typical

hysteresis margin of 500mV. This ensures that

the receiver is virtually immune to noisy trans-

mission lines. Should an input be left uncon-

nected, an internal 5kohm pull-down resistor to

ground will commit the output of the receiver to

a HIGH state.

Charge pump

The charge pump is a patented design and

uses a unique approach compared to older

less efficiant designs. The charge pump re-

quires 4 external capacitors and uses a four

phase voltage shifting technique. The internal

power supply consists of a dual charge pump

that provides a driver output voltage swing of

+/-9V. The internal oscillator controls the four

phases of the voltage shifting. A description of

each phase follows:

Phase 1

Vss charge store and double: The positive ter-

minals of capacitors C and C2 are charged

from Vcc with their negative terminals initially

connected to ground. C+ is then connected

to ground and the stored charge from C- is

superimposed onto C2-. Since C2+ is still con-

nected to Vcc the voltage potential across C2

is now 2 x Vcc.

Phase 2

Vss transfer and invert: Phase two connects

the negative terminal of C2 to the Vss storage

capacitor and the positive terminal of C2 to

ground. This transfers the doubled and inverted

(V-) voltage onto C4. Meanwhile, capacitor C

is charged from Vcc to prepare it for its next

phase.

Phase 3

Vdd charge store and double: Phase three is

identical to the first phase. The positive termi-

nals of C and C2 are charged from Vcc with

their negative terminals initially connected to

ground. C+ is then connected to ground and

the stored charge from C- is superimposed

onto C2-. Since C2+ is still connected to Vcc

the voltage potential across capacitor C2 is

now 2 x Vcc.