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SMB214B 数据表(PDF) 15 Page - Summit Microelectronics, Inc. |
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SMB214B 数据表(HTML) 15 Page - Summit Microelectronics, Inc. |
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15 / 26 page ![]() SMB214A/B/C Summit Microelectronics, Inc 2128 2.0 6/20/2008 15 APPLICATIONS INFORMATION DEVICE OPERATION POWER SUPPLY There are four supply input pins on the SMB214A/B/C: three HVSUP pins and the VBATT pin. Each supply must be powered from an input voltage between 2.7- 6.0 volts. The HVSUP0 though HVSUP2 are used to power the HSDRV (PMOS driver) and LSDRV (NMOS driver) outputs. The rail-to-rail swing on the HSDRV and LSDRV pins is equal to the associated HVSUP supply voltage. The VBATT pin is internally regulated to 2.5V. This 2.5V supply is then filtered on the VDD_CAP pin and used to power all internal circuitry. The VBATT pin is monitored by an Under-Voltage Lockout (UVLO) circuit, which prevents the device from turning on when the voltage at this node is less than the UVLO threshold. OUTPUT VOLTAGE All output voltages on the SMB214A/B/C can be set via the non-volatile configuration registers. Each of the three step-down output voltages on the SMB214A/B/C can be adjusted for 100% duty cycle or 0% duty cycle operation. When 100% duty cycle mode is selected, the output voltage can be set up to the input voltage on the device, while the minimum output voltage is limited to the min duty cycle specification in the DC operating characteristics section. When the 0% duty cycle mode is selected, the maximum duty cycle is limited to the max duty cycle specification in the DC operating characteristics section. POWER-ON/OFF CONTROL Sequencing can be initiated: automatically, by a volatile I 2C Power on command, or by asserting the PWREN pin. When the PWREN pin is programmed to initiate sequencing, it can be level or edge triggered. The PWREN input has a programmable de-bounce time of 100, 50, or 25ms. The de-bounce time can also be disabled. When configured as a push-button enable, PWREN must be asserted longer than the de-bounce time before sequencing can commence, and pulled low for the same period to disable the channels. ENABLE Each output can be enabled and disable by an enable signal. The enable signal is can be provided from either the PWREN pin or by the contents of the enable register. When enabling a channel from the enable register, the register contents default state must be set so that the output will be enabled or disabled following a POR (power on reset). The default state is programmable. CASCADE SEQUENCING Each channel on the SMB214A/B/C may be placed in any one of 3 unique sequence positions, as assigned by the configurable non-volatile register contents. The SMB214A/B/C navigate between each sequence position using a feedback-based cascade-sequencing circuit. Cascade sequencing is the process in which each channel is continually compared against a programmable reference voltage until the voltage on the monitored channel exceeds the reference voltage, at which point an internal sequence position counter is incremented and the next sequence position is entered. In the event that a channels enable input is not asserted when the channel is to be sequenced on, that sequence position will be skipped and the channel in the next sequence position will be enabled. POWER ON/OFF DELAY There is a programmable delay between when channels in subsequent sequence positions are enabled. The delay is programmable at 50, 25, 12.5 and 1.5ms intervals. This delay is programmable for each of the three sequence positions. MANUAL MODE The SMB214A/B/C provide a manual power-on mode in which each channel may be enabled individually irrespective of the state of other channels. In this mode, the enable signal has complete control over the channel, and all sequencing is ignored. In Manual mode, channels will not be disabled in the event of a UV/OV fault on any output or the VBATT pin. FORCE-SHUTDOWN When a battery fault occurs, a UV/OV is detected on any output, or an I 2C force-shutdown command is issued, all channels will be immediately disabled, ignoring sequence positions or power off delay times. SEQUENCE TERMINATION TIMER At the beginning of each sequence position, an internal programmable timer will begin to time out. When this timer has expired, the SMB214A/B/C will automatically perform a force-shutdown operation. This timer is user programmable with a programmable sequence termination period (tPST) of 50, 100, 200 ms; this function can also be disabled. |
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