SFR: WDTCR (Watchdog Timer Control):

Bit-7

Bit-6

Bit-5

Bit-4

Bit-3

Bit-2

Bit-1

Bit-0

-

-

ENW

CLRW

WIDL

PS2

PS1

PS0

ENW: Enable WDT while it is set. ENW cannot be cleared by firmware.

1: = enable watchdog timer, 0: = does not use watchdog timer

CLRW: Clear WDT to recount while it is set. Hardware will automatically clear this bit.

WIDL: Set this bit to disable WDT generating reset even though the μC is in idle mode.

{PS2, PS1, PS0}: select the pre-scalar output.

{0, 0, 0}: = set the pre-scaling value 2

{0, 0, 1}: = set the pre-scaling value 4

{0, 1, 0}: = set the pre-scaling value 8

{0, 1, 1}: = set the pre-scaling value 16

{1, 0, 0}: = set the pre-scaling value 32

{1, 0, 1}: = set the pre-scaling value 64

{1, 1, 0}: = set the pre-scaling value 128

{1, 1, 1}: = set the pre-scaling value 256

Serial IO Port (UART)

The serial port of MPC89x53A is duplex. It can transmit and receive simultaneously. The

receiving and transmitting of the serial port share the same SFR SBUF, but actually there are

two SBUF registers implemented in the chip, one is for transmitting and the other is for

receiving. The serial port can be operated in 4 different modes.

Mode 0

Generally, this mode purely is used to extend the I/O features of this device.

Operating under this mode, the device receives the serial data or transmits the serial data via

pin RXD, while there is a clock stream shifted via pin TXD which makes convenient for

external synchronization. An 8-bit data is serially transmitted/received with LSB first. The baud

rate is fixed at 1/12 the oscillator frequency.

Mode1

A 10-bits data is serially transmitted through TXD or received through RXD. The frame data

includes a start bit (0), 8 data bits and a stop bit (1). After the receiving, the device will keep the

stop bit in RB8 which from SRF SCON.

Baud Rate (for Mode 1)

=

2

SMOD

32

(Timer-2 overflow rate)

16

or =

MEGAWIN

MPC89x53A Data Sheet

23