STM32F101XC datasheet(20/106 Pages) STMICROELECTRONICS

20 / 106 page

Description

STM32F101xC, STM32F101xD, STM32F101xE

20/106

Doc ID 14610 Rev 7

SysTick timer

This timer is dedicated to real-time operating systems, but could also be used as a standard

down counter. It features:

●

A 24-bit down counter

●

Autoreload capability

●

Maskable system interrupt generation when the counter reaches 0.

●

Programmable clock source

2.3.18

I²C bus

Up to two I²C bus interfaces can operate in multi-master and slave modes. They support

standard and fast modes.

They support 7/10-bit addressing mode and 7-bit dual addressing mode (as slave). A

hardware CRC generation/verification is embedded.

They can be served by DMA and they support SMBus 2.0/PMBus.

2.3.19

Universal synchronous/asynchronous receiver transmitters (USARTs)

The STM32F101xC, STM32F101xD and STM32F101xE access line embeds three

universal synchronous/asynchronous receiver transmitters (USART1, USART2 and

USART3) and two universal asynchronous receiver transmitters (UART4 and UART5).

These five interfaces provide asynchronous communication, IrDA SIR ENDEC support,

multiprocessor communication mode, single-wire half-duplex communication mode and

have LIN Master/Slave capability. The five interfaces are able to communicate at speeds of

up to 2.25 Mbit/s.

USART1, USART2 and USART3 also provide hardware management of the CTS and RTS

signals, Smart Card mode (ISO 7816 compliant) and SPI-like communication capability. All

interfaces can be served by the DMA controller except for UART5.

2.3.20

Serial peripheral interface (SPI)

Up to three SPIs are able to communicate up to 18 Mbits/s in slave and master modes in

full-duplex and simplex communication modes. The 3-bit prescaler gives 8 master mode

frequencies and the frame is configurable to 8 bits or 16 bits. The hardware CRC

generation/verification supports basic SD Card/MMC modes.

All SPIs can be served by the DMA controller.

2.3.21

GPIOs (general-purpose inputs/outputs)

Each of the GPIO pins can be configured by software as output (push-pull or open-drain), as

input (with or without pull-up or pull-down) or as peripheral alternate function. Most of the

GPIO pins are shared with digital or analog alternate functions. All GPIOs are high current-

capable except for analog inputs.

The I/Os alternate function configuration can be locked if needed following a specific

sequence in order to avoid spurious writing to the I/Os registers.

STM32F101XC 数据表(PDF) 20 Page - STMicroelectronics

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