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STM32F101T6U6ATR 数据表(PDF) 30 Page - STMicroelectronics |
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STM32F101T6U6ATR 数据表(HTML) 30 Page - STMicroelectronics |
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30 / 73 page ![]() Electrical characteristics STM32F101x4, STM32F101x6 30/74 Doc ID 15058 Rev 3 5.3.2 Operating conditions at power-up / power-down Subject to general operating conditions for TA. Table 9. Operating conditions at power-up / power-down 5.3.3 Embedded reset and power control block characteristics The parameters given in Table 10 are derived from tests performed under the ambient temperature and VDD supply voltage conditions summarized in Table 8. PD Power dissipation at TA = 85 °C(3) LQFP64 444 mW LQFP48 363 VFQFPN36 1110 TA Ambient temperature Maximum power dissipation –40 85 °C Low power dissipation(4) –40 105 °C TJ Junction temperature range –40 105 °C 1. When the ADC is used, refer to Table 41: ADC characteristics. 2. It is recommended to power VDD and VDDA from the same source. A maximum difference of 300 mV between VDD and VDDA can be tolerated during power-up and operation. 3. If TA is lower, higher PD values are allowed as long as TJ does not exceed TJmax (see Table 6.2: Thermal characteristics on page 69). 4. In low power dissipation state, TA can be extended to this range as long as TJ does not exceed TJmax (see Table 6.2: Thermal characteristics on page 69). Table 8. General operating conditions (continued) Symbol Parameter Conditions Min Max Unit Symbol Parameter Conditions Min Max Unit tVDD VDD rise time rate 0 µs/V VDD fall time rate 20 |
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