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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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STM8L101F2P3TR 数据表(PDF) 9 Page - STMicroelectronics |
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STM8L101F2P3TR 数据表(HTML) 9 Page - STMicroelectronics |
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9 / 77 page  STM8L101xx Product overview Doc ID 15275 Rev 7 9/77 3 Product overview Figure 1. STM8L101 device block diagram Legend: AWU: Auto-wakeup unit Int. RC: internal RC oscillator I²C: Inter-integrated circuit multimaster interface POR/PDR: Power on reset / power down reset SPI: Serial peripheral interface SWIM: Single wire interface module USART: Universal synchronous / asynchronous receiver / transmitter IWDG: Independent watchdog STM8 16 MHz int RC Clock controller Clocks AWU Beeper 38 kHz int RC Debug module I²C1 SPI USART Up to 8 Kbytes Flash memory controller 1.5 Kbytes to core and peripherals IWDG Core 16-bit Timer 2 (SWIM) up to 16 MHz Nested interrupt up to 29 external multimaster 8-bit Timer 4 SRAM interrupts (including up to 2 Kbytes data EEPROM) Power Volt. reg. @VDD VDD18 VDD =1.65 V VSS 3.6 V NRST POR/PDR to Reset COMP1 COMP2 Port A Port B Port C Port D RX, TX, CK SDA, SCL PA[6:0] PB[7:0] PC[6:0] PD[7:0] MOSI, MISO, SCK, NSS BEEP SWIM COMP1_CH[4:1] COMP_REF Infrared interface IR_TIM 16-bit Timer 3 TIM2_CH[2:1] TIM3_CH[2:1] TIM2_TRIG TIM3_TRIG COMP2_CH[4:1] |
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