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STM32F103C8T7TR 数据表(PDF) 36 Page - STMicroelectronics |
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STM32F103C8T7TR 数据表(HTML) 36 Page - STMicroelectronics |
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36 / 92 page ![]() Electrical characteristics STM32F103x8, STM32F103xB 36/92 Doc ID 13587 Rev 11 5.3.2 Operating conditions at power-up / power-down Subject to general operating conditions for TA. Table 10. Operating conditions at power-up / power-down 5.3.3 Embedded reset and power control block characteristics The parameters given in Table 11 are derived from tests performed under ambient temperature and VDD supply voltage conditions summarized in Table 9. PD Power dissipation at TA = 85 °C for suffix 6 or TA = 105 °C for suffix 7(3) LFBGA100 454 mW LQFP100 434 TFBGA64 308 LQFP64 444 LQFP48 363 VFQFPN36 1110 TA Ambient temperature for 6 suffix version Maximum power dissipation –40 85 °C Low power dissipation(4) –40 105 Ambient temperature for 7 suffix version Maximum power dissipation –40 105 °C Low power dissipation(4) –40 125 TJ Junction temperature range 6 suffix version –40 105 °C 7 suffix version –40 125 1. When the ADC is used, refer to Table 45: ADC characteristics. 2. It is recommended to power VDD and VDDA from the same source. A maximum difference of 300 mV between VDD and VDDA can be tolerated during power-up and operation. 3. If TA is lower, higher PD values are allowed as long as TJ does not exceed TJmax (see Table 6.2: Thermal characteristics on page 82). 4. In low power dissipation state, TA can be extended to this range as long as TJ does not exceed TJmax (see Table 6.2: Thermal characteristics on page 82). Table 9. General operating conditions (continued) Symbol Parameter Conditions Min Max Unit Symbol Parameter Conditions Min Max Unit tVDD VDD rise time rate 0 µs/V VDD fall time rate 20 |
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