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STM8L101F2P3 数据表(PDF) 41 Page - STMicroelectronics |
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STM8L101F2P3 数据表(HTML) 41 Page - STMicroelectronics |
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41 / 77 page ![]() STM8L101xx Electrical parameters Doc ID 15275 Rev 7 41/77 9.3.2 Power-up / power-down operating conditions 9.3.3 Supply current characteristics Total current consumption The MCU is placed under the following conditions: ● All I/O pins in input mode with a static value at VDD or VSS (no load) ● All peripherals are disabled except if explicitly mentioned. Subject to general operating conditions for VDD and TA. 1. Typical current consumption measured with code executed from Flash. Table 17. Operating conditions at power-up / power-down Symbol Parameter Conditions Min Typ Max Unit tVDD VDD rise time rate 20 - 1300 µs/V tTEMP Reset release delay VDD rising - 1 TBD ms VPOR (1) 1. Data based on characterization results, not tested in production. Power on reset threshold 1.35 - 1.65(2) 2. Data guaranteed, each individual device tested in production. V VPDR (1) Power down reset threshold 1.40 - 1.60 V Figure 11. IDD(RUN) vs. VDD@fCPU =2MHz @4 temperatures Figure 12. IDD(RUN) vs. VDD@fCPU = 16 MHz @4 temperatures ai17017 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 1.6 1.7 1.8 1.9 2 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 3 3.1 3.2 3.3 3.4 3.5 3.6 V DD [V] -40°C 25°C 85°C 125°C ai17018 2 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 3 1.6 1.7 1.8 1.9 2 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 3 3.1 3.2 3.3 3.4 3.5 3.6 V DD [V] -40°C 25°C 85°C 125°C |
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