MCP3002-ISLASHMS datasheet(19/34 Pages) MICROCHIP

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DS21294D-page 19

MCP3002

6.0

APPLICATIONS INFORMATION

6.1

Using the MCP3002 with

Microcontroller (MCU) SPI Ports

With most microcontroller SPI ports, it is required to send

groups of eight bits. It is also required that the

microcontroller SPI port be configured to clock out data

on the falling edge of clock and latch data in on the rising

edge. Depending on how communication routines are

used, it is very possible that the number of clocks

required for communication will not be a multiple of

eight. Therefore, it may be necessary for the MCU to

send more clocks than are actually required. This is

usually done by sending ‘leading zeros’ before the start

bit, which are ignored by the device. As an example,

Figure 6-1 and Figure 6-2 show how the MCP3002 can

be interfaced to a MCU with a hardware SPI port.

Figure 6-1 depicts the operation shown in SPI Mode 0,0,

which requires that the SCLK from the MCU idles in the

‘low’ state, while Figure 6-2 shows the similar case of

SPI Mode 1,1 where the clock idles in the ‘high’ state.

As shown in Figure 6-1, the first byte transmitted to the

A/D Converter contains one leading zero before the

start bit. Arranging the leading zero this way produces

the output 10 bits to fall in positions easily manipulated

by the MCU. When the first 8 bits are transmitted to the

device, the MSB data bit is clocked out of the A/D

Converter on the falling edge of clock number 6. After

the second eight clocks have been sent to the device,

the receive register will contain the lowest-order eight

bits of the conversion results. Easier manipulation of the

converted data can be obtained by using this method.

FIGURE 6-1:

SPI Communication with the MCP3002 using 8-bit segments (Mode 0,0: SCLK idles

low).

456

SCLK

DIN

X = Don’t Care Bits

910

DOUT

NULL

BIT

MCU latches data from A/D Converter

Data is clocked out of

A/D Converter on falling edges

on rising edges of SCLK

Don’t Care

XXX

Start

Bit

(Null)

MCU Transmitted Data

(Aligned with falling

edge of clock)

MCU Received Data

(Aligned with rising

edge of clock)

SGL/

DIFF

ODD/

SIGN

Data stored into MCU receive register

after transmission of first 8 bits

Data stored into MCU receive register

after transmission of second 8 bits

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