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MCP73833 数据表(PDF) 21 Page - Microchip Technology |
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MCP73833 数据表(HTML) 21 Page - Microchip Technology |
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21 / 32 page ![]() © 2009 Microchip Technology Inc. DS22005B-page 21 MCP73833/4 6.2 PCB Layout Issues For optimum voltage regulation, place the battery pack as close as possible to the device’s VBAT and VSS pins, recommended to minimize voltage drops along the high current-carrying PCB traces. If the PCB layout is used as a heatsink, adding many vias in the heatsink pad can help conduct more heat to the backplane of the PCB, thus reducing the maximum junction temperature. Figures 6-4 and 6-5 depict a typical layout with PCB heatsinking. FIGURE 6-4: Typical Layout (Top). FIGURE 6-5: Typical Layout (Bottom). MCP73833 VBAT VDD VSS CIN COUT THERM PG STAT1 STAT2 RPROG VBAT VSS VDD |
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