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MCP4641-502E/MS 数据表(PDF) 61 Page - Microchip Technology

部件名 MCP4641-502E/MS
功能描述  7/8-Bit Single/Dual I2C Digital POT with Non-Volatile Memory
PDF  92 Pages
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制造商  MICROCHIP [Microchip Technology]
网页  http://www.microchip.com
标志 MICROCHIP - Microchip Technology

MCP4641-502E/MS 数据表(HTML) 61 Page - Microchip Technology

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© 2008 Microchip Technology Inc.
DS22107A-page 61
MCP454X/456X/464X/466X
FIGURE 7-4:
I2C Read (Last Memory Address Accessed).
FIGURE 7-5:
I2C Random Read.
STOP bit
Control Byte
1
010
SA2 A1 A0 1
A
Fixed
Address
Variable
Address
Read bits
P
0
000
0
0
0 D8 A1
Read bit
D3
D7 D6 D5 D4
D2 D1 D0 A2
Read Data bits
Note 1: Master Device is responsible for A / A signal. If a A signal occurs, the MCP45XX/46XX will
abort this transfer and release the bus.
2: The Master Device will Not Acknowledge, and the MCP45XX/46XX will release the bus so the
Master Device can generate a Stop or Repeated Start condition.
3: The MCP45xx/46xx retains the last “Device Memory Address” that it has received. This is the
MCP45XX/46XX does not “corrupt” the “Device Memory Address” after Repeated Start or
Stop conditions.
4: The Device Memory Address pointer defaults to 00h on POR and BOR conditions.
STOP bit
Control Byte
READ Command
1
01
0
SA2 A1 A0 0
1
AD AD AD AD
A1
x X
A Sr
0
1
2
3
Fixed
Address
Variable
Address
Device
Memory
Address
Command
Control Byte
Read bits
P
0
00
0
0
0
0 D8 A1
Write bit
D3
D7 D6 D5 D4
D2 D1 D0 A2
1
01
0
A2 A1 A0 1
A
Read bit
Repeated Start bit
Read Data bits
Note 1: Master Device is responsible for A / A signal. If a A signal occurs, the MCP45XX/46XX will
abort this transfer and release the bus.
2: The Master Device will Not Acknowledge, and the MCP45XX/46XX will release the bus so the
Master Device can generate a Stop or Repeated Start condition.
3: The MCP45XX/46XX retains the last “Device Memory Address” that it has received. This is
the MCP45XX/46XX does not “corrupt” the “Device Memory Address” after Repeated Start or
Stop conditions.



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