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M68HC11CPU 数据表(PDF) 13 Page - Motorola, Inc

部件名 M68HC11CPU
功能描述  Single-Chip Microcontrollers (AMCU)
PDF  31 Pages
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制造商  MOTOROLA [Motorola, Inc]
网页  http://www.freescale.com
标志 MOTOROLA - Motorola, Inc

M68HC11CPU 数据表(HTML) 13 Page - Motorola, Inc

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Motorola Master Selection Guide
Single-Chip Microcontrollers (AMCU)
2.6–13
Timer Module (TM)
• 16–bit free–running counter with 8–bit prescaler
• Two TM can be externally cascaded to increase
count width
• Software selected input capture, output compare,
pulse accumulation, event counting, or pulse–width
modulation functions
Communication Modules
Queued Serial Module (QSM)
• Queued full–duplex, synchronous three–line SPI with
dedicated RAM
• Standard, asynchronous NRZ–format SCI
• Polled and interrupt–driven operation
• Pins can be configured as a parallel I/O port
Multi–Channel Communications Interface
(MCCI)
• One full–duplex synchronous three–line SPI
• Two independent standard, asynchronous NRZ–format SCI
• Polled and interrupt–driven operation
• Pins can be configured as a parallel I/O port
Dual Universal Asynchronous/
Synchronous Receiver Transmitter (DUART)
• Dual NRZ Serial RS–232C channels
• Independently programmable TxD and Receiver
Transmitter (DUART)
• RxD Baud rates for each channel up to 76.8K Baud
• Optional external input pins provide baud clock
• Transmit operations are double buffered, and receive
operations are quadruple buffered
• RTS and CTS signals are directly supported
Analog–to–Digital Conversion
Modules
Analog–to–Digital Converter (ADC)
• 8 or 10 bits of resolution
• Eight input channels
• Eight result registers
• Three result alignment formats
• Eight automated conversion modes
• Programmable sample and hold times are provided
• Three result alignment modes
Queued Analog–to–Digital Converter
(QADC)
• 10 bits of resolution
• 16 analog input channels (up to 27 if multiplexed
externally)
• Two independent conversion queues
• 32 result registers (16 per queue)
• Three result alignment formats
• Queued conversions can be performed continuously or
can be retriggered by software or the QADC module
periodic interval timer and external trigger
• Programmable sample and hold times
• Alternate voltage references
Specialized Control Modules
Direct Memory Access (DMA)
• Provides low–latency transfer to external peripheral or
for memory–memory data transfer
• Two independent DMA channels with full
programmability
Memory Modules
Standby RAM (SRAM)
• Fast Static RAM maintained by voltage from standby
voltage pin
• Available in 1K, 1.5K, 2K, 3.5K, and 4K blocks
• Fast (2 clock) access speed
• Byte, word, and long–word operations supported
Standby RAM with TPU Emulation
(TPURAM)
• Fast Static RAM maintained by voltage from standby
voltage pin
• Available in 1K, 1.5K, 2K, 3.5K, and 4K blocks
• Fast termination (2 clock) access speed
• Supports TPU microcode ROM emulation
• Byte, word, and long–word operations supported
Masked ROM (MRM)
• Custom–masked non–volatile 16–bit wide memory
• Available in 4K increments from 8K to 48K bytes
• Fast (2 clock ) access speed
• Byte, word, and long–word operations supported
• Boot ROM capability
Flash EEPROM (FLASH)
• Word programmable, bulk erasable non–volatile 16–bit
wide memory
• Available in 8K increments from 8K to 64K bytes
• Fast (2 clock) access speed
• Byte, word, and long–word operations supported
• Boot ROM capability
• External 12 volt programming/erasure source required
Block Erasable Flash EEPROM
(BEFLASH)
• Available in 8K increments from 8K to 64K bytes
• Eight independently–erasable blocks
• Fast termination (2 clock) access speed
• Byte, word, and long–word operations supported
• Byte/Word programming with 12 volt external input



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