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MPC5643LF0VMM1 数据表(PDF) 81 Page - Freescale Semiconductor, Inc |
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MPC5643LF0VMM1 数据表(HTML) 81 Page - Freescale Semiconductor, Inc |
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81 / 98 page ![]() Electrical characteristics MPC5643L Microcontroller Data Sheet, Rev. 3 Preliminary—Subject to Change Without Notice Freescale Semiconductor 81 Figure 17. JTAG test clock input timing Figure 18. JTAG test access port timing 8tTDOHZ D TCK low to TDO high impedance — — 20 ns 11 tBSDV D TCK falling edge to output valid — — 50 ns 12 tBSDVZ D TCK falling edge to output valid out of high impedance — — 50 ns 13 tBSDHZ D TCK falling edge to output high impedance — — 50 ns 14 tBSDST D Boundary scan input valid to TCK rising edge — 50 — ns 15 tBSDHT D TCK rising edge to boundary scan input invalid — 50 — ns Table 32. JTAG pin AC electrical characteristics (continued) No. Symbol Parameter Conditions Min Max Unit TCK 1 2 2 3 3 TCK 4 5 6 7 8 TMS, TDI TDO |
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