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MPC8377VRALFA 数据表(PDF) 108 Page - Freescale Semiconductor, Inc |
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MPC8377VRALFA 数据表(HTML) 108 Page - Freescale Semiconductor, Inc |
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108 / 124 page  MPC8377E PowerQUICC™ II Pro Processor Hardware Specifications, Rev. 2 108 Freescale Semiconductor Clocking High 0110 6 : 1 — High 0111 7 : 1 High 1000 8 : 1 High 1001 9 : 1 High 1010 10 : 1 High 1011 11 : 1 High 1100 12 : 1 High 1101 13 : 1 High 1110 14 : 1 High 1111 15 : 1 1 CFG_CLKIN_DIV select the ratio between CLKIN and PCI_SYNC_OUT. 2 CLKIN is the input clock in host mode; PCI_CLK is the input clock in agent mode. Table 77. CSB Frequency Options for Agent Mode CFG_CLKIN_DIV at reset 1 SPMF csb_clk : Input Clock Ratio 2 Input Clock Frequency (MHz) 2 25 33.33 66.67 csb_clk Frequency (MHz) — Low 0010 2 : 1 133 Low 0011 3 : 1 100 — Low 0100 4 : 1 — 133 — Low 0101 5 : 1 125 — — Table 76. CSB Frequency Options for Host Mode (continued) CFG_CLKIN_DIV at Reset 1 SPMF csb_clk : Input Clock Ratio 2 Input Clock Frequency (MHz) 2 25 33.33 66.67 csb_clk Frequency (MHz) — |
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