SE4120L

GNSS Receiver IC

Applications

Dual-mode GPS and Galileo receivers

Software-defined GNSS radio systems

High sensitivity / low power GNSS / A-GNSS apps.

Portable navigation devices, mobile phones, and

GNSS peripheral devices

Telematics equipment

Features

Single conversion L1-band GPS/Galileo radio with

integrated IF filter

2-bit serialized digital I/Q output at near-zero IF

Integrated LNA with high-gain (18.5 dB typ.) and

low NF (1.7 dB typ.)

Low 2.2 dB typ. RF system noise figure

Low 10 mA operating current with 2.7-3.6 V supply;

8 mA with internal LNA disabled

Low Standby current 3 μA typical

Fully integrated VCO and resonator

Integrated PLL supporting 16.368 MHz reference

frequency

I/O supply range extends down to 1.7 V

4 x 4 mm 24 pin QFN, RoHS-compliant package

Ordering Information

Part No.

Package

Remark

SE4120L-R

24 Pin QFN

Shipped in Tape & Reel

Product Description

The SE4120L is a highly-integrated GNSS radio front

end IC offering high performance and low power

operation in a wide range of low-cost applications. It

supports GPS and dual-mode L1-band GPS/Galileo

products.

The SE4120L features a conditioned

interface for software implementations of GNSS

baseband signal processing.

The SE4120L includes an on-chip LNA, a low IF

receiver with a linear AGC and an advanced multi-bit

I/Q analog to digital converter (ADC) with serialized

data output. The receiver incorporates a fully integrated

image reject mixer, obviating the need for a SAW filter

in many applications. The SE4120L’s on-chip IF filter

may be adjusted from 2.2 MHz BW (for GPS only) to

4.4MHz BW (for simultaneous reception of Galileo and

GPS signals). The digitized I/Q output, centered near-

zero IF, is available in a serialized data stream to

facilitate software signal processing.

The highly-integrated PLL synthesizer of the SE4120L

requires only two passive components to implement an

off-chip loop filter.

The SE4120L is optimized for the lowest possible

power consumption consistent with a very low external

component count.

The SE4120L incorporates current-controlled low-

spurious output buffers which may be run from a

separate external supply to interface to low voltage

systems. Output buffers supply sufficient current to

drive most baseband devices directly.

Functional Block Diagram

SE4120

Phase/Frequency

Detector

Quadrature

÷2

Feedback

Divider

IF Filter

~

~

~

VCO

-45°

+45°

ADC

~

AGC

Controller

IQ

Reference

Divider

VTUNE

XTAL2

XTAL1/

TCXO IN

VAGC

CLK_OUT

Chip

Control

Sample

Clock

divider

OSC_EN

RX_EN

FILT_BW

Fs_SEL1

Fs_SEL0

SYNC

DATA_OUT

AGC_DIS

RVI

Buffer

Optional

filter

LNA_IN

LNA_OUT

MIX_IN

LNA

Oscillator

/ Buffer

PLL Loop

Filter

FILT_BW

Data

Downconverter /

Serializer

.

DST-00059 Rev 3.5 May-26-2009

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